Laws%SRI-AI@sri-unix.UUCP (01/10/84)
ALICE: A parallel graph-reduction machine for declarative and other
languages.
SPEAKER - John Darlington, Department of Computing, Imperial College,
London
WHEN - Monday, January 23, 4:30pm
WHERE - AIC Conference Room, EK242
[This is an SRI AI Center talk. Contact Margaret Olender at
MOLENDER@SRI-AI or 859-5923 if you would like to attend. -- KIL]
ABSTRACT
Alice is a highly parallel-graph reduction machine being designed and
built at Imperial College. Although designed for the efficient
execution of declarative languages, such as functional or logic
languages, ALICE is general purpose and can execute sequential
languages also.
This talk will describe the general model of computation, extended
graph reduction, that ALICE executes, outline how different languages
can be supported by this model, and describe the concrete architecture
being constructed. A 24-processor prototype is planned for early
1985. This will give a two-orders-of-magnitude improvement over a VAX
11/750 for derclarative languages. ALICE is being constructed out of
two building blocks, a custom-designed switching chip and the INMOS
transputer. So far, compilers for a functional language, several logic
languages, and LISP have been constructed.