pete@utcsrgv.UUCP (P. Schoeler) (06/28/84)
My master's thesis at U of Toronto involves examining the use of multi-
processor achitectures in 3D image rendering. Current litterature on the
subject is fairly small (Clarke's Geometry Engine, Weinberg's antialiased
hidden surface removal proposal, Fuch's Pixel Planes ...oops, nearly forgot
Fiume et al.'s Ultracomputer proposal).
I'd be interested in knowing of anybody currently working in the area.
If you are, and would like to exchange ideas, send me mail. I'm
currently looking into :
* data flow architectures
* object and image space partitioned hidden surface removal architectures.
* hardware antialiasing
* extensions to the geometry engine.
If interest seems high, a meeting could be set up at SIGGRAPH.
I'm open to any suggestions (well ... almost any suggestion).
Peter Schoeler
University of Toronto
UUCP: {decvax,linus,ihnp4,uw-beaver,allegra,utzoo}!utcsrgv!pete
CSNET: pete@toronto