[net.graphics] Orphaned Response

brucet@hpgrla.UUCP (brucet) (01/15/85)

Re:  RIPPOFF

	I have not dealt with the company in  question  but I have had a
similar situation happen to me before.  I sent off to a mail order house
for some electronics equipment, got my canceled check, but no equipment.
What I did was  contact  the  local  postmaster  general.  What you have
described  to  me is  mail  fraud.  It  may  not  hurt  to  contact  the
postmaster  general  in the zip code of the  company as well.  When this
happened  to me, the amount in  question  was less than $20.  The $2000
amount you  mentioned  should  interest the post  office.  I received my
refund within 3 days after contacting the postmaster general.

	Another  outlet is to contact the federal trade  commission  for
California.  A  registered  letter  to the  president  of  this  company
stating you have contacted the commission maybe all it takes to get some
action.  You may also call the Better Business Bureau and tell them what
has been  happening  but I have not had much luck getting  action out of
them.  You may use this as another scare tactic as described above.

	If this  doesn't  work, you can always sue.  The trouble is that
the fees for this would exceed the $2000!!

Bruce "GET TOUGH" Thompson   
Hewlett Packard

thom@hpfcrh.UUCP (thom) (04/13/85)

GKS (Graphical Kernal System) is a programmer's interface to graphics.
A programmer's interface differs from a device interface in that it
is targetted for graphics applications writers and is generally bound
to a programmer language in the form of a library of functions and/or
procedures (the binding to BASIC is an exception in this regard as the
semantics are defined in terms of constructs of the programming language).
The primitives of GKS are 2D, however 3D extensions to the 2D standard
are currently being developed.  In addition to primitives, attributes,
workstation control, deferral mode control, input, graphics segmentation,
metafile control, and viewing are defined in GKS.  

GKS was originally developed by the West German standardization body, DIN.
They submitted it to ISO TC97/SC21/WG5-2 for processing as an international
standard.  It was chose over the ACM CORE'79 proposal.  It then went through
considerable review and change as an ISO work item.  ANSC X3H3, the predominant
force in United States graphics standardization, has been involved in the
review and change of GKS in the ISO arena.  ANSC is currently in the process
of making this ISO standard and ANSI standard (of course ANSC X3H3 is putting
a little value added into it).  

As far as the status of these standards, ISO GKS is pretty much done except
for the paperwork.  ANS GKS is a little behind it, but is in pretty much the
same state.  At this point implementors can feel pretty safe about implementing
it and application writers can likewise feel safe writing to it.  As mentioned
in earlier notestrings though, the language bindings of GKS are still being
processed, so the only solid language binding to GKS is FORTRAN ( a BASIC
binding is done, but I reveal my bias away from BASIC as a programming language
by not including it { asbestos up } ).

Rather than go into anymore detail I will refer you too a good overview
article on the subject:

  "GKS -- The First Graphics Standard", Bono, Encarnacao, Hopgood, ten Hagen
  IEEE CG&A, July 1982, pages 9-23.

There are a lot of articles out there (about 50% which are accurate).

There are also two books available:

  "Computer Graphics Programming, GKS - The Graphics Standard",
  G. Enderle, K. Kansy, G. Pfaff.
  Springer-Verlag.

  "Introduction to the Graphical Kernel System - GKS",
  F.R.A. Hopgood, D.A. Duce, J.R. Gallop, D.C. Sutcliffe.
  Academic Press.

I hope you find the information useful.

Tom Morrissey.
decvax!hplabs!hpfcla!thom

rjn@hpfcmp.UUCP (rjn) (05/09/85)

re: shuttle image bits

If you are referring to the split wire-frame/temperature-gradient  color image
of the shuttle,  that was  developed  years ago for  Hewlett-Packard  (for the
intro of the  now-obsolete  HP9845C).  I see from the trade  magazines that it
has  been  widely  stolen/imitated  since  (although  its  not  clear  that we
copyrighted the data).

The bits have been used in all HP98xx and HP9000  demos since.  Anyone at your
site who has a 9845C, Series 200 (9816, 9817, 9920, 9826, 9836, 9837) BASIC or
Series 500 (9020) BASIC system may have the demo software.

Regards,                                                Hewlett-Packard
Bob Niland                                              3404 East Harmony Road
hplabs!hpfcla!rjn                                       Fort Collins CO  80525

thom@hpfcrh.UUCP (thom) (05/12/85)

RE: Information on the Programmers Hierarchical Graphics Standard (PHIGS).

You are correct ANSC X3H3.1 is developing this standard.  You can get a
copy of the draft (please note that it is under development) by contacting:
   
      X3 Secretariat, CBEMA
      311 First St., NW, Suite 1200
      Washingington, DC  20001
      202-737-8888

Ask for the PHIGS draft under development by X3H3.1.  There will be a
charge for reproduction and shipping of about $35.

ANSC X3H3 is currently considering whether to forward PHIGS for public
review.  When it is forwarded for public review it will become a draft
proposed American National Standard (dpANS) and be given a standard number
designation.

Hope this helps you,

-- Tom Morrissey.
hplabs!hpfcla!thom

berger@datacube.UUCP (05/31/85)

We manufacture frame grabbers and image processors that can plug into
a unibus vax via a  unibus /  q-bus adaptor  or plug  directly into a
micro-vax.  We even have vms or C drivers for it.   These boards will
digitize video in real time  from any  rs-170 video  source and drive
any rgb rs-170 monitor.  

You can contact me by mail or phone if you would like more info!

	Bob Berger Datacube Inc.
	
	ima!inmet!mirror!datacube!berger
	decvax!cca!mirror!datacube!berger
	decvax!genrad!wjh12!mirror!datacube!berger
	{mit-eddie,cyb0vax}!mirror!datacube!berger

	4 Dearborn Rd. Peabody, Ma 01960
	617-535-6644

shep@datacube.UUCP (07/28/85)

rochester!sher wrote:
>I have recently completed a TR studying the effect of differing
>architectures on low-level computer vision.  I compared the CMU WARP
>and the BBN Butterfly.  The interpretation task was pattern
>recognition using convolution based techniques on edge images.  
>The architectural features that effected the choice of implementation
>of the routines were in order of importance:
>1. Relative speeds of instructions (floating point vs fixed point vs
>memory access)
>2. Local memory available per processor
>3. Interconnection net between processors
>Actually the effect of the interconnection net was completely masked
>by the first two issues.  My research thus indicates that the
>interconnection net is not a significant issue as far as architectures
>for computer vision are concerned.  

	I argue that the interconnection network between processors -is-
the critical link in some machine vision architectures. A good article,
"Computer Architectures for Pictorial Information Systems" appeared in
November 1981 IEEE Computer. In that article, the dimensions of parallelism
in image processing was explored. Simply put, parallelism in image
processing may be broken down into:
	- Operator Parallelism
	- Image Parallelism
	- Neighborhood Parallelism
	- Pixel-bit Parallelism

	I am not familiar with the two architectures (CMU WARP, BBN Butterfly)
mentioned. But your results suggest that these architectures have most
of any parallelism along the "image" axis. If this is in fact the case, I
would agree totally with your findings.

	Out along the other dimensions of parallelism, the interconnection
issue becomes critical. An operator parallel intensive architecture requires
small amounts of local processor storage, but has a high input and output
bandwidth requirement due to its pipelined nature. My personal design
bias has long favored operator parallel techniques.
(shep == "Should Have Everything Pipelined")

	Since there are so many different ways of addressing the "low-level"
image processing tasks that underlie the scene segmentation issues, it
would be foolish lock into a particular "religion" for these tasks. Instead,
I feel an open approach must be taken while we explore different architectures,
and evaluate their performance.

Shep Siegel                               ihnp4!datacube!shep
Datacube Inc.                  ima!inmet!mirror!datacube!shep
617-535-6644                  decvax!cca!mirror!datacube!shep
4 Dearborn Rd.       decvax!genrad!wjh12!mirror!datacube!shep
Peabody, Ma. 01960   {mit-eddie,cyb0vax}!mirror!datacube!shep

shep@datacube.UUCP (07/28/85)

	Ranking filters are yet another interesting non-linear filter. The
image algebra termed "mathematical morphology" is a powerful tool
for understanding their transformations. Read "Image Analysis and
Mathematical Morphologhy" by Serra (AP). You will like it.

Shep Siegel                               ihnp4!datacube!shep
Datacube Inc.                  ima!inmet!mirror!datacube!shep
617-535-6644                  decvax!cca!mirror!datacube!shep
4 Dearborn Rd.       decvax!genrad!wjh12!mirror!datacube!shep
Peabody, Ma. 01960   {mit-eddie,cyb0vax}!mirror!datacube!shep

george@mnetor.UUCP (George Hart) (08/01/85)

In article <6700022@datacube.UUCP> shep@datacube.UUCP writes:
>
>I am not familiar with the two architectures (CMU WARP,BBN Butterfly) mentioned

FYI:

There is an excellent discussion on multiprocessing technology in the
June/85 issue of IEEE Computer where the WARP and Butterfly architectures
are discussed (brief excerpts below).

The Warp is (or will be, the article speaks of it in the future tense)
a systolic array machine, consisting of 10 processing elements, each
10MFLOPS, interconnected via custom VLSI. GE and Honeywell are
industrial partners in this with CMU.  There exists a 9 element, 10
MIPS prototype.

The Butterfly is a switch based machine using 8Mhz M68k as processing
elements, AMD-2901 bit slicers as MMU's, and custom VLSI for
switchers.  A 128 node machine has been delivered and is supposed to be
available on Arpanet (to/by whom, I don't know).  If fully populated
with memory, that 128 node machine will have 512 Mb of *global*(!!)
memory since each node's local memory can be globally accessed via the
butterfly switch.
-- 


Regards,

George Hart, Computer X Canada Ltd.
UUCP: {allegra|decvax|linus|ihnp4}!utzoo!mnetor!george
BELL: (416)475-8980

skinner@saber.UUCP (Robert Skinner) (08/05/85)

> 
> The Butterfly is a switch based machine using 8Mhz M68k as processing
> elements, AMD-2901 bit slicers as MMU's, and custom VLSI for
> switchers.  A 128 node machine has been delivered and is supposed to be
> available on Arpanet (to/by whom, I don't know).  If fully populated
> with memory, that 128 node machine will have 512 Mb of *global*(!!)
> memory since each node's local memory can be globally accessed via the
> butterfly switch.
> -- 
> 
> 
> Regards,
> 
> George Hart, Computer X Canada Ltd.
> UUCP: {allegra|decvax|linus|ihnp4}!utzoo!mnetor!george
> BELL: (416)475-8980

I heard  about 6 month's ago from a friend at Advanced Information and Design 
Systems, Mountain View, CA, that they were to receive a Butterfly machine.
(That company name, AIDS, is not a joke.  The company is older than the
disease.)  He shall remain nameless, the phone number is 415-941-3912.  I 
don't know the Arpanet pathname.

------------------------------------------------------------------------------

Name:	Robert Skinner
Mail:	Saber Technology, 2381 Bering Drive, San Jose, California 95131
AT&T:	(408) 945-0518, or 945-9600 (mesg. only)
UUCP:	...{decvax,ucbvax}!decwrl!saber!skinner
	...{amd,ihnp4,ittvax}!saber!skinner

shep@datacube.UUCP (08/08/85)

>-David Sher sher@rochester seismo!rochester!sher wrote...
>On the topic of FFT vs convolution, my latest TR on doing template matching
>on the WARP and the Butterfly addresses this issue for these architectures.
>However it is not classy to push ones own work so enough said.

Hogwash. Tell us what you are doing! This is a hot issue. We would like
to hear. You can send my response to all the people who claim your
response isn't "classy"!
Shep Siegel                               ihnp4!datacube!shep

shep@datacube.UUCP (01/26/86)

Datacube has a high resolution, 14.3MHz sample rate, 765*512*8/16/24/32-bit
board family for color image acquisition/processing/display. This is
suitable for recording the rgb outputs directly from a NTSC or PAL format
colour television camera. The "123" family is available on Multibus or
Q-bus and a new "423" product is available for Q-bus.

Datacube has a plethora of additional products for colour signal digitization,
processing, and display. They are available on -many- different buses and
at -many- different resolutions.

Mail datacube!wiz or datacube!jose for more info and technical answers.

Shep Siegel                    UUCP: [ihnp4 | mirror]!datacube!shep
Datacube Inc.; 4 Dearborn Rd.; Peabody, Ma. 01960; +1 617 535 6644

thom@hpfcla.UUCP (02/19/86)

Here are a couple of older articles:

------------------------------------------------------------------------
       ID:  Cahn84
   Author:  Cahn, D., E. McGinnis, R. F. Puk, and C. S. Seum
    Title:  The PHIGS System
   Source:  Computer Graphics World, Feb. 1984, pp. 33-40
Doc. Type:  Journal Article
 Keywords:  PHIGS, GKS, Core
  Remarks:  All of the authors are active members of X3H3.1 and 
	    know what they are talking about.
------------------------------------------------------------------------
       ID:  Wagn84
   Author:  Wagner, P.
    Title:  Graphics Standards, A Special Report
   Source:  Computer Graphics World, Feb. 1984, pp. 11-13,97
Doc. Type:  Journal Article
 Keywords:  Standards, GKS, Core, ISO, ANSI, PHIGS, NCGA
  Remarks:  Introduction to Special Report on Graphics Standards
------------------------------------------------------------------------

And here are a couple of newer articles:

------------------------------------------------------------------------
       ID:  Heck86
   Author:  Heck, Mick
    Title:  PHIGS hits the market
   Source:  Computer Graphics World, Jan. 1986, pp. 149-53.
Doc. Type:  Journal Article
 Keywords:  Standards, PHIGS
  Remarks:  Mike is on X3H3.1 and a project lead for Megatek/Template's
	    Figaro project.
------------------------------------------------------------------------
       ID:  Buns86
   Author:  Bunshaft, Al and Ab-Ezzi, Salim
    Title:  An Implementor's view of PHIGS
   Source:  IEEE Computer Graphics and Applications, Jan (or Feb?) 1986.
Doc. Type:  Journal Article
 Keywords:  Standards, PHIGS
  Remarks:  Al and Salim are on X3H3.1.  Al worked on IBM GraPHIGS 
	    implementation and Salim is responsible in part for RPI's
	    implementation of PHIGS.
------------------------------------------------------------------------

I am co-authoring an article on PHIGS for the IEEE CG&A issue for Siggraph 86.
It will deal with what PHIGS is and how it compares with GKS and GKS-3D.
If the articles above don't answer your questions contact me and we will 
see what we can do.

-- Tom Morrissey.
ANSI and ISO PHIGS document editor
decvax!hplabs!hpfcla!thom