rburns@fortune.UUCP (Randyll Burns) (03/29/85)
I was just reading an article which appeared yesterday in the SF Chronicle on Charlie Moore's hardware implementation of Forth. I would be very interested in hearing from folks with a deeper knowlege of this project. I was surprised to hear that they are so far along. The article says they are shipping evaluation units next week. The prototype chip is supposed to benchmark at 10 times the speed of a 68k. Their intention is to have the chip used in computers with 1/4 the speed of a cray in a few years.
rich@hplvla.UUCP (rich) (04/03/85)
I too am interested in this gate array implementation of a Forth engine. The current edition of ELECTRONIC DESIGN contains a cover story about the chip written by Moore, Brodie and one other person. It gives some details on the architecture but not quite enough info. Anybody know how I could get a data/spec sheet on the part ???? Rich Manzini HP Loveland Instrument Division {hplabs!hplvla!rich}