schaefer@bgsuvax.UUCP (Stephen Schaefer) (06/25/86)
Every microprocessor I've ever met has an extremely fast, single instruction threaded interpreter in hardware. Unfortunately, the designs of the systems built around them usually preempt it. I wrote a very nice Forth on my TRS-80 whose NEXT assembly code was spelled: RET Of course, I had to turn off all the interupts.... -- Stephen P. Schaefer Systems Programmer schaefer@bgsu ...!cbosgd!osu-eddie!bgsuvax!schaefer