daemon@ucbvax.UUCP (06/29/84)
From @SANDIA.ARPA:JPAnderson.DODCSC@MIT-MULTICS.ARPA Thu Jun 28 16:00:08 1984 I don`t know if this is the correct list to be posting this in but here goes. Does anyone have any information pertaining to the automatic layout of IC packages on a wirewrap board? What I want to be able to do is to feed a netlist to this program and have it come back with an optimal ( least amount of wire used) or close to optimal layout of the packages. Any information would be greatly appreciated. Jay Anderson JPAnderson -at mit-multics