info-vlsi@ucbvax.ARPA (11/27/84)
From: Tony.Marriott@uw-vlsi.ARPA
CMOS TOOLSET AVAILABLE
(RELEASE 2.1)
The University of Washington / Northwest VLSI Consortium has assembled and
integrated a number of VLSI tools from educational and industrial sources.
A second release of these tools (compatible with Berkeley UNIX 4.2) is now
available and is free of charge to universities and government contractors.
Fully supported are: buried contact nMOS processes, the MOSIS 3 micron bulk
CMOS process, and a 5 micron isoplanar CMOS process.
Included in this package are:
The March 1983 VLSI Tools from UC Berkeley, including Caesar,
Lyra, Crystal, Mextra, Tpack, Spice2g6, and our enhancements
to these tools.
A pascal-based procedural layout system (Plap) with placement
and interconnect capability for cells created with a graphical
editor.
Artwork display programs driving printers, penplotters and crt
displays.
A netlist generator and timing simulator (derived from MIT's
Net/Presim/Rnl) including extensive tutorials.
Pads, padframes, and PLA generators in all technologies.
Characterized layouts for a set of standard cells in bulk and
isoplanar CMOS.
All inquiries should be addressed to:
Vicky Palm
UW/NW VLSI Consortium
Department of Computer Science, FR-35
University of Washington
Seattle, Washington 98195
Telephone: (206) 545-3796
Electronic Mail: palm@washington
_________________________________info-vlsi@ucbvax.ARPA (11/28/84)
From: ihnp4!gargoyle!sphinx!supp@BERKELEY (Steve Upp)
info-vlsi@ucbvax.ARPA (12/02/84)
From: ihnp4!akgua!mcnc!ncsu!uvaee!eap@BERKELEY Having obtained copies of the earlier Berkeley tools, we would be interested in this new package as well. I remember receiving a package recently which described something similar, requiring something like $100 fee. Is this the same thing and, in any case, how do you wish orders to be placed?