[fa.info-vlsi] question on CMOS processing

info-vlsi@ucbvax.ARPA (03/10/85)

From: <unido!mcvax!cernvax!harald@BERKELEY>


We have been participants on an MPC. The technology is 5 micron CMOS (AMI).
On testing we find that all outputs show levels in the range of 2-3 Volts,
using a supply of 5 Volts. We have measured both pull-up and pull-down
transistors in the pad driver to be ON. This also explains the rather high
power consumption. Now, other chips on the MPC have had working pad-drivers
so we must conclude processing has been O.K.
  Can anyone explain how both pull-up and pull-down transistors can be
switched on? And also what we should look for when we get access to a probe-
station? I must also mention that we have used the 5 micron standard cell
library from AMI.
  Please answer directly to me, as I have not received any mail yet from the
INFO-VLSI mailing list.
				      Best Regards, Harald Haugan

Harald Haugan                   Usenet: ucbvax!decvax!mcvax!cernvax!harald
CERN, Division DD               ARPA: no direct connection, but
1211 Geneve 23                  bassen@oslo-vax   will eventually get here.
Switzerland

info-vlsi@ucbvax.ARPA (03/13/85)

From: stephany.WBST@XEROX.ARPA

Harald:

This is a guess.  It may be that the chip has too much illumination.
All Silicon transitors are photosensitive.  we had this problem with a
MPC chip two years ago: a shift register did not work properly until a
piece of black tape was placed over the chip stopping the light.  Hope
this might help you.

					Joe