[net.micro.atari] ST bus cycles...BLITTER?!?!?!?!?!?!?

jan@looking.UUCP (Jan Gray) (02/05/86)

In article <12180482042.28.G.DYER@SU-SCORE.ARPA> G.DYER@SU-SCORE.ARPA (Landon Dyer) writes:
>
>There are two 250ns windows.  One window is for "static" system requests
>(video DMA and memory refresh).  The other window is available for disk
>DMA, blitter DMA, and processor accesses.  Refresh cycles are done during
      ^^^^^^^^^^^
>horizontal and vertical blank (and take, say, 5% of the first window).
>When the first window is not being used, it is available to fill requests
>that would otherwise go to the second window.

WHAT BLITTER?????  Somewhere in the documentation I saw an interrupt
vector for "gpu blt done"...but nothing else!  I can't believe there
is special hardware for bitblt on the ST, since vro_cpyfm() is
too damn slow(*).  Unless, of course, the "blitter" is only useful for
doing no-skew, whole word transfers...

Please please please tell us more.  Maybe you could even fill us in on
how to do bitblt from the line A vector (since my documentation (and
others) were missing the last n pages of the "Long Awaited Line A
Document").

Thanks,
Jan Gray	Looking Glass Software, Waterloo Ont.	(519) 884-7473

p.s. Are you *the* l. dyer who wrote the BIOS, etc (or at least had his
name on the listings?)

(*) That is, for doing large image processing tasks like "spreading" the
screen, running life on the whole screen etc.  (BTW, can anyone beat
400,000 life cell-generations per second on their ST?)