[ut.general] Cider Seminar on An Expandable Fault Tolerant Multiprocessor

szymans@utecfa.UUCP (Ted Szymanski) (10/30/85)

		Cider Seminar Series
    An Expandable Fault Tolerant Multiprocessor
                    Architecture
                  By Steve Germann
                    Room GB 221
                    Time: 12:05
            Date: Friday, Nov. 1st, 1985
                      Abstract
   A high-speed local area network  interconnects
   processor-memory  pairs  to provide a means of
   implementing a pseudo-shared memory interface.
   One   possible  configuration  is  that  of  a
   cylindrical banyan network, with  the  outputs
   folded  back  to  the  inputs,  and all 2 by 2
   switches  replaced  by  combination  switching
   elements  and processor/memory pairs.  Network
   configuration,  and  its  effects   on   fault
   tolerance  will be considered.  The effects of
   various architectural choices on the types  of
   application  programs  that  run  well  on the
   machine will also be discussed.