[ut.general] John Mashey Speaks at UofT

duncan@hammer.me.toronto.edu () (11/09/88)

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This is a repost, we were in conflict with Silicon Graphics
IRIS demos. They have rescheduled to 2:00 - 3:50, and we are 
rescheduling to 4:00 to 5:30 (CSRI 20th Anniversary starts 
at that time).

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Dr. John Mashey, V.P. of Systems Technology at MIPS Computers Inc.
will be speaking at the University of Toronto on RISC development.

DATE: WED Nov 16th
TIME: 4:00 PM
ROOM: SF1101 (Sanford Fleming, 10 Kings College Rd)

TOPIC: "RISC, MIPS, and the Motion of Complexity"

John Mashey may be known to many of you by his frequent postings
to comp.arch on the net. MIPS has supplied a backgrounder on him
and his talk which I have included verbatim. We have had visits
from both MIPS and SUN in the past, which have been very well
attended (and even interesting, from time to time).

MIPS makes an interesting RISC computer which is in competition
with Sun's SPARC processor.

Hope to see you there,
			Dunc.

================== BACKGROUNDER =============================
RISC (Reduced Instruction Set Computer) architecture has 
recently become a very hot topic, as research efforts have led
to a number of commercial products. The goal of RISC is to make
faster computers cheaper, using optimizing compilers, carefully 
engineered instruction sets, and high-preformance memory
hierarchies.  RISC designs have established themselves rapidly
in the marketplace, beginning with high-performance
workstations, but spreading to other areas.  Although CISC
designs will certainly survive, it now seems there will be no 
new successful CISC architectures.   Like the CISC micro battles
of the early 1980's, a ferocious war is now being fought over
which, if any, RISC micros will be considered "standards".

This talk reviews the motivation for the RISC approach, some of
its history, notable variations in its application, and its fit
with UNIX.  It describes some of the work on RISC at MIPS
Computer Systems, emphasizing the interaction of chip design
with optimizing compilers and operating systems, using the
fastest current RISC chips (MIPS R3000s) as examples.

Dr. Mashey joined Bell Laboratories in 1973, starting in the
Programmer's Workbench department the week its first PDP-11/45
arrived.  He worked on various UNIX-related projects, including
PWB/UNIC4X, command languages, text processing, the merger of 
UNIX versions that resulted in UNIX/TS 1.0, and UNIX-based
applications for use in the Bell System.  In 1983, he moved to 
Convergent Technologies, ending as Director of Software
Engineering for the Data Systems Division. In 1985, he joined 
MIPS Computer Systems, where he helped design the MIPS R2000
RISC architecture, and managed operating systems, networking,
and software QA.  He was an ACM National Lecturer for 4 years,
and has given about 250 public talks on software engineering,
UNIX, and RISC design.


-- 
Duncan Poole
	    Dept. of Mechanical Engineering,  University of Toronto
	    Usenet: duncan@me.toronto.edu, duncan@me.utoronto.ca
	    Netnorth:  DUNCAN at UTORONTO
	    Phone: (416) 978-4987