ucbesvax.turner@ucbcad.UUCP (05/25/83)
Relay-Version:version B 2.10 5/3/83; site harpo.UUCP Posting-Version:version B 2.10 5/3/83; site ucbcad.UUCP Message-ID:<562@ucbcad.UUCP> Date:Wed, 25-May-83 07:38:14 EDT Sender:notes@ucbcad.UUCP Organization:UC Berkeley, CAD Group #R:noscvax:-13800:ucbesvax:12800001:000:1049 ucbesvax!turner May 25 00:41:00 1983 The multiple-dedicated-processors scheme embodied in the BCC 500 might well have been an outgrowth of frustration with Berkeley's CDC 6400 system. From vague recollection of conversations with people remotely associated with it, CAL TSS (I think it was) was a bomb as a time-sharing system because Seymour Cray had done too good of a job of designing a batch machine. Nothing glaringly wrong with the software architecture (that I know), but it was poorly matched to the available hardware. The 6400 also has multiple-dedicated-processors, and was a phantasmagorical design. It was built entirely with discrete components at a time when everybody was going for IC's. Cray just didn't trust what he couldn't see, apparently. (Even now, his machines are built up from a very small repetoire of chips whose design he has overseen--except, perhaps, for the ECL RAMs.) Notwithstanding, the 6400 was not retired until last year, although it had been running in the red as an operation for quite some time. Michael Turner ucbvax!ucbesvax.turner