dre@megatest.UUCP (06/15/83)
At the time of the development of the Cray-1 the 100K ECL family did not exist, nor did the ECL gate arrays we have today. The primary logic element in the Cray 1 is the 1688 MECL III 4-5 input OR-NOR gate. This was the only subnanosecond gate that was multiply sourced at the time. An ECL gate consists of a differential amplifier with emitter follower buffered outputs. This has the characteristic that there is no difference in propagation delay between the inverting and non-inverting outputs. Thus if both outputs are terminated the device presents a purely resistive load to the power supply because there are no current spikes. Packaging density was achieved by using flatpackages attached to a ceramic carrier which I believe held something like 100 chips. Cooling was a major engineering problem on the Cray 1 and was accomplished by using Freon pumped through extruded aluminum conduit. I believe they had a difficult time developing conduit that didn't fail. One other note: NAND is a dirty word to an ECL designer! The function is achieved by wire-ORing inverters, of course. Dave Emberson Megatest Corp. Sunnyvale, CA megatest!dre