mjl@ritcv.UUCP (07/05/83)
After reading most of the articles on the RISC concept and the three
commonly cited examples (RISC I, Stanford's MIPS project, and the
IBM 801), I'm almost ready to agree with Paul Scherf's contention that
RISC programming = vertical microprogramming. There is at least one
important difference, however, between the RISC machines and other
vertical machines: the former are much "cleaner" architectures,
because they are simplified in such a way as to enhance code
optimization and generation. Most commercial vertical machines, on the
other hand, are designed to support cost effective interpretation of
other architectures; the simplicity of these latter processors is
primarily in the amount of useful work a single instruction can
perform. Issues addressed by the RISC designs (orthogonality,
regularity, generality) are notably absent in most vertical
microprogrammable processors.
Mike Lutz
{allegra,seismo}!rochester!ritcv!mjl