pparkinson@wateng.UUCP (Peter Parkinson) (10/11/83)
Here is the list of references I have compiled following my request for anything anyone might have on the subject. I have tried to eliminate the duplicate references but a number of these articles are redundant. In general only one or two of these papers would be required for an understanding of the concepts. Thanks to Manolis Katevenis and Howard Landman for their assistance. One last note: Is this all that is published on the MIPS and 801 machines? Does anyone have anymore? Peter Patterson, D.A., and Ditzel, D.R., ``The Case for the Reduced Instruction Set Computer,'' Computer Architecture News, Vol. 8, No. 6, October 1980, pp. 25-33. Clark, D.W. and Strecker, W.D., ``Comments on `The Case for the Reduced Instruction Set Computer,''' Computer Architecture News, Vol. 8, No. 6, October 1980, pp. 34-38. Hennessy, J., Jouppi, N., Przybylski, S., Rowen, C., Gross, T., Baskett, F., and Gill, J., ``MIPS: A Microprocessor Architecture,'' Proceedings from the 15th Annual Workshop on Microprogramming, November 1982, pp. 17-22. Radin, G., ``The 801 Minicomputer,'' Proceedings from the Symposium on Architectural Support for Programming Languages and Operating Systems, March 1982, pp. 39-47. Patterson, D.A. and Sequin, C.H., ``RISC I: A Reduced Instruction Set VLSI Computer,'' Proceedings from the Eighth Symposium on Computer Architecture, May 1981, pp. 443-457. Fitzpatrick, Foderaro, Katevenis, Landman, Patterson, Peek, Peshkess, Sequin, Sherbourne, & Van Dyke, "A RISCy Approach to VLSI," VLSI Design 4th Qtr 1981 Hansen, Mayo, Linton, Murphy, & Patterson, "A Performance Evaluation of the Intel iAPX432," Computer Architecture News, June 1982 bench marks the 432 on the same test programs used to test RISC Foderaro, Van Dyke, & Patterson, "Running RISCs," VLSI Design, Sept/Oct 1982 Katevenis, M.G.H, Sherburne, R.W, Patterson, D.A., and Sequin, C.H., ``The RISC II Micro-Architecture,'' Submitted to the VLSI 83 Conference, August 83, Norway. Larus, J.R., ``A Comparison of Microcode, Assembly Code, and High-Level Languages on the VAX-11 and RISC I,'' Computer Architecture News, Vol. 10, No. 5, September 1982, pp. 10-15. Patterson, D.A. and Piepho, R.S., ``RISC Assessment: A High-Level Language Experiment,'' Proceedings from the Ninth Symposium on Computer Architecture, April 1982, pp. 3-8. Patterson, D.A. and Sequin, C.H., ``A VLSI RISC,'' IEEE Computer, Vol. 15, No. 9, September 1982, pp. 8-21. Foderaro, J.K., Van Dyke, K.S., and Patterson, D.A., ``Running RISCs,'' VLSI Design, September/October, 1982.
leichter@yale-com.UUCP (Jerry Leichter) (10/14/83)
There is an article on the 801 in a recent - I think July - IBM Systems Journal. I haven't looked at the article and can't comment on it. -- Jerry