[net.arch] Z800 -- any information ?

bcase@uiucdcs.UUCP (07/21/84)

#R:glasgow:-79700:uiucdcs:27800018:000:2135
uiucdcs!bcase    Jul 21 15:56:00 1984

I have the new Zilog data book in which the Z800 is described.  The idea
is basically to integrate an enhanced Z80, memory management, and a cache
on one chip.  They seem to have thought of most things, e.g. the cache
can be a cache or just some on-chip RAM with especially fast access.  They
also have pipelined the implementation of the Z80, so that it should be
quit a bit faster than the old chips.  They say that 10 MHz chips will
be available initially, but that chips capable of handing clock rates of
up to 25 MHz will eventually be sold.

You may also be interested in knowing about the Z80000, Zilog's 32-bit
microprocessor.  Compatable with the Z8000 stuff, it also has an on-chip
cache (256 bytes organized as 16 lines of 16 bytes, same for the Z800),
an on-chip TLB for true virtual memory, a pipelined implementation (6
pipe stages!!  Yeech!!!), and a multiplexed, 32-bit data/address bus.
The Z80000 cache can be configured to cache data only, instructions only,
instructions and data, or turned off.  Also, lines can be locked into
the cache.  The TLB has bits which can declare pages to be non-cacheable
so that junk that doesn't belong there will not screw up the coherency.
The TLB page size is selectable (512, 1024, and 2048 bytes, I think...).
The TLB contains 16 entries, LRU replacement.  Instructions for selective
invalidations in the TLB are provided.  Etc., etc.  They seem to have
thought of most things, considering they had to put everything on chip.
Also initial 10 MHz, later 25 MHz.  My only beef is that they are going
to have a hell of a time doing this in NMOS, and if they had just abandoned
the stupid Z8000 architecture and gone with a RISC-style one, they would
have done much better.  Also, is the 256-byte cache really going to do
much good?  I think 16 TLB entries might be enough, but if it isn't,
what is the poor system designer to do?  I think they should have left
most of this junk OFF CHIP to let people make their own decisions, but
that is just my opinion....

Try getting the data book from Zilog.

    bcase
    Brian Case
    ..!ihnp4!uiucdcs!bcase
    ..!ihnp4!amd!amdcad!bcase

bcase@uiucdcs.UUCP (07/21/84)

#R:glasgow:-79700:uiucdcs:27800019:000:2148
uiucdcs!bcase    Jul 21 15:59:00 1984

I have the new Zilog data book in which the Z800 is described.  The idea
is basically to integrate an enhanced Z80, memory management, and a cache
on one chip.  They seem to have thought of most things, e.g. the cache
can be a cache or just some on-chip RAM with especially fast access.  They
also have pipelined the implementation of the Z80, so that it should be
quite a bit faster than the old chips.  They say that 10 MHz chips will
be available initially, but that chips capable of handing clock rates of
up to 25 MHz will eventually be sold.

You may also be interested in knowing about the Z80000, Zilog's 32-bit
microprocessor.  Compatable with the Z8000 stuff, it also has an on-chip
cache (256 bytes organized as 16 lines of 16 bytes, same for the Z800),
an on-chip TLB for true virtual memory, a pipelined implementation (6
pipe stages!!  Yeech!!!), and a multiplexed, 32-bit data/address bus.
The Z80000 cache can be configured to cache data only, instructions only,
instructions and data, or turned off.  Also, lines can be locked into
the cache.  The TLB has bits which can declare pages to be non-cacheable
so that junk that doesn't belong there will not screw up the coherency.
The TLB page size is selectable (512, 1024, and 2048 bytes, I think...).
The TLB contains 16 entries, LRU replacement.  Instructions for selective
invalidations in the TLB are provided.  Cache is write-through. They seem to
have thought of most things, considering they had to put everything on chip.
Also initial 10 MHz, later 25 MHz.  My only beef is that they are going
to have a hell of a time doing this in NMOS, and if they had just abandoned
the stupid Z8000 architecture and gone with a RISC-style one, they would
have done much better.  Also, is the 256-byte cache really going to do
much good?  I think 16 TLB entries might be enough, but if it isn't,
what is the poor system designer to do?  I think they should have left
most of this junk OFF CHIP to let people make their own decisions, but
that is just my opinion....

Try getting the data book from Zilog.

    bcase
    Brian Case
    ..!ihnp4!uiucdcs!bcase
    ..!ihnp4!amd!amdcad!bcase

mwm@ea.UUCP (07/23/84)

/***** ea:net.arch / glasgow!gavin / 11:02 am  Jul 20, 1984 */
 I have heard a few rumours about the up and coming Zilog chip, Z800.
Can anyone fill me in on the real details ?
/* ---------- */

I'd heard that Zilog cancelled the project - they had decided that the
chip would be obsolete before it hit the market.

Can anybody out there confirm or deny this rumor?

	<mike

bcase@uiucdcs.UUCP (07/25/84)

#R:glasgow:-79700:uiucdcs:27800020:000:439
uiucdcs!bcase    Jul 25 10:20:00 1984

Well, It was described in the data book that I just got from Zilog.  And
I sent away for it just about 3 weeks ago (I responded to an ad offering
a *free* video tape describing the Z80000; I got the tape and the data
book).  If it were cancelled, wouldn't it have been so stated in some
sort of accompanying note or such (perhaps not, I don't know how companies
handle this sort of situation)?

    ..ihnp4!amdcad!amd!bcase
    Brian Case

kissell@flairvax.UUCP (Kevin Kissell) (07/26/84)

(this space intentionally left blank)

The Z800 has been threatening to exist for several years now. I saw
some preliminary data sheets back in '82, but never any samples.  After 
a while, I mentally wrote it off, but recently Zilog has been running 
glossy ads offering to send interested parties a videotape depicting the
wonders of the Z800 and the Z80000 (their 32-bit pipelined Z8000).
I'm not sure whether this means that the Z800 is finally happening or
that the Z80000 is trapped in the Phantom Zone ;-)

Kevin D. Kissell
Fairchild Research Center
Advanced Processor Development
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    {ucbvax sdcrdcf}!hplabs!/

"Any closing epigram, regardless of truth or wit, grows galling
 after a number of repetitions"

gurr@west44.UUCP (Dave Gurr) (08/02/84)

< force of habit ... >

I had heard that Exxon, being the owner of Zilog, had decided to sit on
the Z800 and use it in its own workstation/micro, and NOT release it to
the general public.

Anyone from Exxon care to comment ?

	                    		 mcvax
	"You can't clean the      	      \
	toilet Neil, real students		ukc!west44!gurr
	don't do that!"			      /
					vax135

	Dave Gurr, Westfield College, Univ. of London, England.

v.gavin@glasgow.UUCP (vic) (08/07/84)

 I have heard a few rumours about the up and coming Zilog chip, Z800.
Can anyone fill me in on the real details ?


       Any information will be gratefully recieved.

                          vic, "... and Morgel the friendly Drell"

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