paul@greipa.UUCP (Paul A. Vixie) (06/16/85)
I posted this about two weeks ago but we were testing 2.10.3 and it decided for some reason not to forward any news (back to 2.10.2 now, BTW). While it has nothing to do with the current subjects in net.arch, I still want to give you all a chance to flame my 32032 code, so.... ------------------------------------------------------------------------------- In article <210@uthub.UUCP> thomson@uthub.UUCP (Brian Thomson) writes: >The C statement > a = b * c + d + e; > >might, in different contexts be implemented on your 32032 as: > movd _b,r0 > muld _c,r0 > addd _d,r0 > addd _e,r0 > movd r0,_a > >or, if c is the constant 2, d a stack local, and e the constant 4, > movd _b,r0 > addr 4(-4(fp))[r0:w],_a > >or even, if b, c, and d are all unsigned shorts, and e == b, > movzwd _b,r0 > indexw r0,_c,_d ; b * (c+1) + d > movd r0,_a Or, how about: ; extern long int a, b, c, d, e; ; a = b * c + d + e; movd ext(_b), tos muld ext(_c), tos addd ext(_d), tos addd ext(_e), tos movd tos, ext(_a) ; extern long int a, b; ; #define c 2 ; auto long int d; ; #define e 4 ; a = b * c + d + e; movd ext(_b), tos muld 2, tos addd 4(fp), tos addd 4, tos movd tos, ext(_a) ; extern long int a; ; extern unsigned short int b, c, d; ; a = b * c + d + b; movzwd ext(_b), tos movzwd ext(_c), tos muld tos, tos movzwd ext(_d), tos addd tos, tos movzwd ext(_b), tos addd tos, tos movd tos, ext(_a) ---------------- The above code is not very pretty nor efficient. In each case I have done five operations: move, multiply, add, add, move. The only real difference is in the addressing modes; this seems common of compiler-generated code. I am no longer (thank <insert deity here>) an expert on the 68xxx, but I don't remember an external or frame-relative addressing mode; one assumes that the many otherwise useless address registers will be used to hold the current global and frame pointers, and the loader has alot of fixing up to do on those globals - every reference needs modification, not just an extern table (unless you plan to have your compiler generate enough low-level stuff to do what the 32xxx external addressing mode does automagically). Not being a compiler writer (yet :-), anyway) I don't see many other things a compiler could optimize for (except the "muld 2, tos" which could have been "ashd 1, tos" but only vax-11 C from DEC does this). I do know that the 68xxx's addressing modes and strange restrictions on address and data registers are more characteristic of RISC than a machine with all those instructions. Can the 68xxx even do a "addd -(sp), (sp)" without doing the pop at the wrong time? The one I worked with didn't have any memory-to-memory instructions; you could do register to memory, memory to register, or register to register, but they were all different instructions (in fact, different instructions for address and data registers, and that's when they felt like providing them - often you had to move into an (address or data) register from a (data or address) register to do a simple operation. Gosh, what a ramble. Sorry about that everybody. My point in all this is that a compiler can generate *clean* code *easily* for the 32xxx because of all the neato addressing modes; generating code for the 68xxx is either (easy, ugly, inefficient) or (hard, functional, efficient) but that's like a choice between the electric chair and the gas chamber. Paul Vixie {pyramid,dual,decwrl}!greipa!paul -- Paul Vixie {decwrl dual pyramid}!greipa!paul