[net.arch] Multi Instruction set CISC

blarson@oberon.UUCP (Bob Larson) (06/24/85)

One type of multi-instruction set computer not yet mentioned in this 
round is made by Prime.  They have several (5) sets of microcode, selected
by special instructions or by part of the subroutine calling sequence.

Three of the microcode sets are mainly for backwards compatablility.
(which Prime does better than Dec does with the Pdp11 mode of a Vax.)
The other two let the programmer/compiler writer select which mode is
best for the routine.  (Lots of special purpose instructions Vs more
and bigger registers.)

They have recently announced additional instructions to support Fortran 77
and C better, which will only be available on their processors that load
microcode from floppies.  (All but the oldest of the currently sold 
processors.)

Microcode support of one of the more popular pakages (Prime Information)
is also available on some of their processors, however the lack of
documentation of this makes it useless for other purposes.

You will probably be seeing more about Primes, since they will be 
shipping their Unix very soon.  (Sys V, called "Primix")

Bob Larson
Arpa: Blarson@Usc-Ecl.Arpa
Uucp: ihnp4!sdcrdcf!uscvax!oberon!blarson