[net.arch] RISC/CISC/microcode:

herbie@watdcsu.UUCP (Herb Chong [DCS]) (06/27/85)

unless i've been terribly mislead all these years, IBM's 370 machines
keep their microcode in RAM and will continue to do so.  many of the
hardware assist features are because of microcoded handling of
operating system functions.  if they find a bug, then the microcode is
replaced.  is there a good reason for keeping microcode for a mainframe
in ROM given the use that i have mentioned above?  if this topic has
already been covered to death sometime in the past, send e-mail,
please.

Herb Chong...

I'm user-friendly -- I don't byte, I nybble....

UUCP:  {decvax|utzoo|ihnp4|allegra|clyde}!watmath!water!watdcsu!herbie
CSNET: herbie%watdcsu@waterloo.csnet
ARPA:  herbie%watdcsu%waterloo.csnet@csnet-relay.arpa
NETNORTH, BITNET, EARN: herbie@watdcs, herbie@watdcsu