peterb@pbear.UUCP (12/21/85)
I have been working on a pet project for a while, and would like some input
from some of the people reading this group. I am slowly developing a
pseudo-RISC machine using AMD's 32 bit parts, and am trying to decide
on the register set. The intended environment is a UNIX box, so it has
to to everything(hah) well, and has nospecific target environment (i.e
number crunching or BitBlting, etc).
I am leaning toward a set like Intel's 386, (no segments, so no flames!!).
This reasoning is that the instruction set is more compact since the
operand is partially wired into the instruction, and the decoder is faster
since it can determine the register faster. I realize thatt people will
point out that more registers are better since then operand access is more
expensive. I am working around this by a fully associative operand cache,
so that commonly used operands are cached.
I guess that the actual question is:
Is a symetric instruction set faster than a nonn-symetric set that
also has an operand cache???
Any pointers to papers or other work in this area???
Peter Barada
{harvard|ihnp4}!ima!pbear!peterb