crabb@katie.DEC (Charlie Crabb HLO2-2/G13 SEG/CAD -dtn 225-5739) (01/31/86)
>The RISC development to watch is the Clipper chip set from Fairchild. >It is more up to date technology, has on chip floating point and seperate >single chip cache and memory management support. This chip set has been talked about for some time. Does anyone know of its status, and is there any info on its architecture? /Charlie Crabb crabb%katie.dec@decwrl.arpa
markp@valid.UUCP (Mark P.) (02/02/86)
> >The RISC development to watch is the Clipper chip set from Fairchild. > >It is more up to date technology, has on chip floating point and seperate > >single chip cache and memory management support. > > This chip set has been talked about for some time. Does anyone > know of its status, and is there any info on its architecture? > > /Charlie Crabb crabb%katie.dec@decwrl.arpa There are two reference books now- "CLIPPER Module Product Description," which is a very technical reference booklet (70pp) and "CLIPPER 32-Bit Microprocessor Module INSTRUCTION SET" (about 130pp). You can call Fairchild's Advanced Processor Division at 800-423-5516 (415-858-4249 in California). Their address is 4001 Miranda Ave., Palo Alto, CA 94304. They have working modules, which are currently in Beta test. The module consists of a CPU/FPU chip and 2 CAMMU (cache/memory management). The fairly interesting architecture includes separate 4KB instruction and data caches with a 16 MW/s synchronous bus. The chips themselves are surface mount with 132 pins on 50mil centers. They apparently only intend to sell the modules at first (3" by 4.5" board with 96-pin DIN connector), and chips by themselves next year. Modules will go to production in June, with samples costing about $2400, large quantities around $1400. They also sell a cross-support package for VAX-ULTRIX, consisting of compilers and a simulator which gives you "in-depth analysis" of the cpu's operation during code execution (so you can optimize code better). That goes for $8000, and is available off-the-shelf. There are also supposedly interfaces to conventional busses in the works, although my recall of this is fuzzy (Q-Bus was included, but none of the major 32-bit busses). There is compiler support for C now, at least, by Greenhills. Fortran and Pascal are promised for June. Again details should be considered fuzzy at best. Mark Papamarcos Valid Logic ..hplabs!pesnta!valid!markp I have absolutely no affiliation with Fairchild, although I know somebody who was going to interview with them. All information presented is purely from the mouths of Fairchild reps, and should be taken as is appropriate.