[net.arch] Separate I/D caches.

jack@boring.UUCP (03/07/86)

In my opinion, two caches, one for instruction, one for data,
should perform almost as good as a two-way cache. The big
advantage seems to be that it's almost as easy to construct
as a one-way cache, provided the CPU gives an indication of
which cycles are I and which are D.

But, who am I to ramble away on this.... Anyone got some real
research results?
-- 
	Jack Jansen, jack@mcvax.UUCP
	The shell is my oyster.