gnu@hoptoad.uucp (John Gilmore) (02/27/86)
In article <90@pyramid.UUCP>, dan@pyramid.UUCP (Danial Carl Sobotta) writes: > > Minneapolis, February 18, 1986 -- Cray Research, Inc., announced today > >that Apple Computer, Inc. has ordered a CRAY X-MP/48 supercomputer. > > ... The system will be used to simulate future hardware and > >software architectures and to accelerate new product development. > > Sounds like a load of B.S. to me!! Why would Apple need that much > power to simulate their next PC??? I mean, is this overkill or what!! They are serious. I believe their intention is to do hardware-level simulation of completely new (not yet built) products, so they can develop the software and debug it "in real time" while running on a simulation of a proposed product. This should speed up product development because there's always a stage in development where the software people are waiting for the hardware to come up. (You can make only so many changes and then you'd better debug.) They apparently believe a Cray running full tilt can emulate e.g. a Mac and run at about the same speed as the micro would. Plus have much better debugging facilities. If it introduces one major product two months early I bet it pays for itself handsomely. Or if it improves that product by 30% because they could test 20 or 30 options (cache? 8K cache? 64K cache? faster clock with more wait states? video rams versus regular rams? ...) when their competitors have to guess and just try one or two. I wish I'd thought of it... -- John Gilmore {sun,ptsfa,lll-crg,ihnp4}!hoptoad!gnu jgilmore@lll-crg.arpa
LOGIN@amdahl.UUCP (LOGIN) (03/01/86)
In article <562@hoptoad.uucp>, gnu@hoptoad.uucp (John Gilmore) writes: > They apparently believe a Cray running full tilt can emulate e.g. a Mac > and run at about the same speed as the micro would. Plus have much better > debugging facilities. > > If it introduces one major product two months early I bet it pays for itself > handsomely. Or if it improves that product by 30% because they could test > 20 or 30 options (cache? 8K cache? 64K cache? faster clock with more wait > states? video rams versus regular rams? ...) when their competitors have > to guess and just try one or two. > A Cray probably isn't fast enough to run at the same speed as the target machine, if you are actually doing logic simulation. Just by way of sanity check, our logic simulator runs at 10e-9 times real time (on a 15 MIPS machine). So assuming you can go 100 times faster with a 10 times simpler design to work on, and a 10 times faster simulator computer, you would run at a simulated speed of 10e-7 times real time. Even if you got another factor of 10, you need a lot of simplification to get up to real time. Lets say you can sustain 200 MFlops on the Cray, then with a (say) 10 MHz clock on the target machine you only get 20 instructions per simulated cycle. That's not a lot of computation. -- Mike Taylor ...!{ihnp4,hplabs,amd,sun}!amdahl!mat [ This may not reflect my opinion, let alone anyone else's. ]
david@ztivax.UUCP (03/06/86)
/* Written 2:20 am Mar 1, 1986 by LOGIN@amdahl in ztivax:net.arch */ In article <562@hoptoad.uucp>, gnu@hoptoad.uucp (John Gilmore) writes: >> They apparently believe a Cray running full tilt can emulate e.g. a Mac >> and run at about the same speed as the micro would. Plus have much better >> debugging facilities. > >A Cray probably isn't fast enough to run at the same speed as the >target machine, if you are actually doing logic simulation. >Just by way of sanity check, our logic simulator runs at 10e-9 times >real time (on a 15 MIPS machine). So assuming you can go 100 times >faster with a 10 times simpler design to work on, and a 10 times faster >simulator computer, you would run at a simulated speed of 10e-7 times >real time. Even if you got another factor of 10, you need a lot of >simplification to get up to real time. Lets say you can sustain 200 >MFlops on the Cray, then with a (say) 10 MHz clock on the target machine >you only get 20 instructions per simulated cycle. That's not a lot >of computation. The Cray may well be useful for what they have in mind. First of all, those clock frequencies everyone talks so losely about in micro-programmed micro's don't equate to instruction speed. A 10MHz 68000 really can only do limited instruction mixes at 1MIP, not 10MIPS. Therefore, they can (using your estimates) do about 200 instructions per target instruction. Might be enough. I am not sure if the 200MIPS taes into consideration the highly parallel architecure of machine simulation software, so perhaps the CRAY can do even better than that. Also, the Nanodata QM-1 (or boat_anchor-1) could just about emulate an 8080 in real-time, and that was using stone age (1970) technology. I believe the QM-1 was about 200KIPS, and the 8080 about 50KIPS. The problem many QM-1 users found is that it took longer to micro-code the emulation than to build hardware! david smyth free and proud of it seismo!unido!ztivax!david
mat@amdahl.UUCP (Mike Taylor) (03/10/86)
In article <2900005@ztivax.UUCP>, david@ztivax.UUCP writes: > /* Written 2:20 am Mar 1, 1986 by LOGIN@amdahl in ztivax:net.arch */ > In article <562@hoptoad.uucp>, gnu@hoptoad.uucp (John Gilmore) writes: > >> They apparently believe a Cray running full tilt can emulate e.g. a Mac > >> and run at about the same speed as the micro would. Plus have much better > >> debugging facilities. > > > >A Cray probably isn't fast enough to run at the same speed as the > >target machine, if you are actually doing logic simulation. > The Cray may well be useful for what they have in mind. > those clock frequencies everyone talks so losely about in > micro-programmed micro's don't equate to instruction speed. A 10MHz > 68000 really can only do limited instruction mixes at 1MIP, not > 10MIPS. Therefore, they can (using your estimates) do about 200 > instructions per target instruction. Might be enough. > Also, the Nanodata QM-1 (or boat_anchor-1) could just about emulate an > 8080 in real-time, and that was using stone age (1970) technology. The difference is logic simulation vs. simple emulation. Logic simulation is sensitive to the number of cycles (it doesn't "know" about instructions, just about gates and clocks, etc.). Simple emulation can usually be done, as you indicate, at about a 40:1 to 60:1 execution time ratio. -- Mike Taylor ...!{ihnp4,hplabs,amd,sun}!amdahl!mat [ This may not reflect my opinion, let alone anyone else's. ]