mash@mips.UUCP (John Mashey) (03/07/86)
1) We finally started talking about this thing in public, at COMPCON in
SanFrancisco, yesterday. The 3 papers are:
"A CMOS RISC Processor with Integrated System Functions"
"Operating System Support on a RISC"
"Engineering a RISC Compiler"
If you'd like copies of these, write/call/email to Leslie Potts at MIPS Computer
Systems, {decvax|ihnp4|ucbvax}!decwrl!leslie}.
2) This isn't a real product announcement; that will occur 2Q86, including
details of benchmarks (don't ask before that w/o nondisclosure).
3) Many details, including instruction formats, memory management, etc,
are in the papers.
4) In summary, the R2000 is typically 5X a VAX (UNIX, vs regular C compiler,
or VMS Fortran). People familiar with IBM 801's, HP SPectrum, etc will
find many similarities, i.e., it has only 32 bit instructions, it has 32
registers, it has high-optimization compilers. It has some ideas (and people!)
from the Stanford MIPS chip project, but has many differences, as appropriate
between university research and real production systems.
It is a very nice chip for UNIX, including an unusual on-chip
TLB (64 entries, fully-associative(isn't VLSI nice!)) that avoids many
performance hits in normal TLB design.
The chip has about 100K transistors, and is implemented in 2micron CMOS.
5X performance comes from an 8Mhz part. The 2micron part was designed
to go at 16Mhz, but was conservatively designed to allow trivial chip-shrinks
and speedups. It has no cooling fins; you can touch it without discomfort,
i.e., this is what you use to build desktop VAX 8600/8650 equivalents in 1986.
Bottom line: very fast now, expect to double every 18 months for a while.
The very first chip rev had no logic errors, just a couple capacitance/timing
problems, which are fixed. It took about a year from beginning design to
very usable silicon [i.e., first chips ran bootprom code, for example].
--
-john mashey
UUCP: {decvax,ucbvax,ihnp4}!decwrl!mips!mash
DDD: 408-720-1700
USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086david@ztivax.UUCP (03/11/86)
>/* ---------- "MIPS R2000 RISC chip" ---------- */ >1) We finally started talking about this thing in public, at COMPCON in >SanFrancisco, yesterday. The 3 papers are: > >2) This isn't a real product announcement; that will occur 2Q86, including > >It is a very nice chip for UNIX, including an unusual on-chip >TLB (64 entries, fully-associative(isn't VLSI nice!)) that avoids many >performance hits in normal TLB design. > >i.e., this is what you use to build desktop VAX 8600/8650 equivalents in 1986. > >-john mashey What is TLB? You are really going to DELIVER soon enough for people to make PRODUCTS this calendar year? I hope you folks are not learning the tricks of the semi-conductor trade so soon (ie, lie, lie, lie, just don't tell te truth...) seismo!unido!ztivax!david