jer@peora.UUCP (J. Eric Roskos) (03/08/86)
This posting brought back many fond memories; the first machine I ever did
any systems programming on was a PDP-8, and as an undergraduate I spent
many hours disassembling a very primitive OS that ran on that machine in
order to learn how it worked. (I was thinking the other day that I wished
I had one of them now, in fact, just for sentimental reasons!)
As the person who wrote the original posting mentioned, the mnemonics he
gave were somewhat different from the real ones; the real mnemonics for the
five memory reference instructions were AND, TAD, ISZ, DCA, and JMS.
(The DCA [deposit and clear accumulator] is, incidentally, quite valuable
for obscure theoretical reasons.)
One thing the poster left out (or didn't mention in detail, anyway) was
the two "augmented instructions" of the PDP-8. The first of these,
the "IOT" instruction, did I/O operations; the first 3 bits of the
instruction were an octal 6, the next six bits identified the device on
which the operation was to be performed, and the last 3 bits identified the
operation to be performed on the device. (Actually the low-order 9 bits
were broadcast to all devices; the device whose ID matched was supposed to
accept and act upon the low-order 3 bits. In those days I didn't know
anything about how the hardware worked, so I don't know what the device did
then, but it could apparently read and write the accumulator in response to
this instruction.)
The other augmented instruction was called "The Operate Instruction", and
consisted of three groups of "microinstructions". Group 1 performed
logical operations on the accumulator; group 2 did tests which
conditionally skipped the next instruction based on the value of the
accumulator, and group 3 worked on the "multiplier quotient" register.
(Group 1 and 2 also operated on the "link bit", which was essentially a
carry bit out of the adder, although it was often used as a flag bit since
there were instructions to explicitly set and clear it.)
Here are the operate group 1 microinstructions:
NOP 7000 No operation. Caused a 1-cycle delay.
IAC 7001 Increment accumulator.
BSW 7002 Byte swap (on a 6-bit byte).
RAL 7004 Rotate accumulator left.
RTL 7006 Rotate two left.
RAR 7010 Rotate accumulator right.
RTR 7012 Rotate two right.
CML 7020 Complement link.
CMA 7040 Complement accumulator.
CLL 7100 Clear Link.
CLA 7200 Clear accumulator.
Notice that, except for RAR, RAL, RTR, RTL, and BSW, each of these
operations is represented by a distinct bit in the instruction word. These
were called "microinstructions" because you could combine more than one of
these operations into one instruction by virtue of this fact. There were
four commonly-used combinations that had their own mnemonics:
CIA 7041 Complement and Increment Accumulator.
STL 7120 Set the link (actually clear and complement link).
STA 7240 Set the accumulator (actually CLA and CMA).
GLK 7204 Get the Link (actually CLA and RAL).
The second group of "microinstructions" was even better bit-encoded. The
high-order 4 bits of these instructions all had 1s; the remaining bits were
as follows (numbering from the left):
4 - clear accumulator
5 - skip on minus accumulator
6 - skip on zero accumulator
7 - skip on non-zero link
8 - reverse skip sense of bits 5, 6, and 7
9 - or switch register (on front panel) into accumulator
10 - halt
11 - always zero
If more than one bit was set, the skips were done first, followed by the
clear-accumulator (CLA) (since otherwise the accumulator would be
cleared before it was tested), followed by the OSR or HLT. There were
ten mnemonics that were combinations of the above (which you can figure
out easily from the above): HLT, OSR, SKP, SNL, SZL, SZA, SNA, SMA,
SPA, and CLA. You could also combine several of the skip instructions into
one; the following were legal:
SZA SNL
SNA SZL
SMA SNL
SPA SZL
SMA SZA
SPA SNA
SMA SZA SNL
SPA SNA SZL
And, finally, there were the "group 3 operate microinstructions"; however,
they were used mostly for the KE8 Extended Arithmetic Element, which we
didn't have on the PDP-8 I used, so I won't go into those.
The PDP-8 was a really amazing machine to learn from, since it had lights
on the front panel which showed the state of all the internal flags and
registers, as well as the instruction-execution state of the processor.
Because it was so simple, it was also easy to learn to use.
(Incidentally, the internal registers visible on the front panel included
the accumulator, the execution state (fetch, defer, or execute), the
instruction register (opcode), the memory data direction, the link,
the interrupt enable flag, the memory data register, the memory address
register, the actual bus contents, the interrupt request line,
and a few other registers and flags having to do with bus operation.)
Well, I hope the above will also bring back fond memories for other people
who once knew this machine, and will help those who didn't to know a little
more about this very historic machine.
--------
"PDP" is a trademark of the Digital Equipment Corporation.
(Incidentally, according to the PDP-8 manual, so is the phrase "Computer
Lab"!)
--
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sukenick@ccnysci.UUCP (03/10/86)
>the two "augmented instructions" of the PDP-8. The first of these, >the "IOT" instruction, did I/O operations; the first 3 bits of the >instruction were an octal 6, the next six bits identified the device on >which the operation was to be performed, and the last 3 bits identified the >operation to be performed on the device. > The IOT instruction was also used to set data fields and instruction fields. The PDP8 is a 32K word machine (There might have been a 128k version?) which was divided into 8 fields of 4k each. The addressing modes could access either a page at a time ('direct' addressing - 128 words) or a field ('indirect addressing - 4K words). IOT instructions such as CDF (62X1) (Change Data Field) and CIF (Change Instruction Field) (62X2) changed the field that the instruction using indirect addressing would operate upon. > >Well, I hope the above will also bring back fond memories for other people >who once knew this machine, and will help those who didn't to know a little >more about this very historic machine. > The PDP8 has an interesting peripheral : a 'parallel' processor - the FPP12 floating point processor with its own instruction set, program counter and accumulator. The PDP8 would intialize and start the FPP12. Once started, the CPU and the FPP would operate in parallel, the FPP fetching instructions via DMA. Communication between the two proccesors is either though memory(all of which is shared) or an interrupt that the FPP could set. A nice system for doing real time I/O (via the CPU) and number crunching (FPP) . (If only 32k memory was enough!) (and this was a 1973 machine!) >-------- >"PDP" is a trademark of the Digital Equipment Corporation. >(Incidentally, according to the PDP-8 manual, so is the phrase "Computer >Lab"!)
john@ektools.UUCP (03/10/86)
In article <2007@peora.UUCP> jer@peora.UUCP (J. Eric Roskos) writes: >This posting brought back many fond memories; the first machine I ever did >any systems programming on was a PDP-8, and as an undergraduate I spent >many hours disassembling a very primitive OS that ran on that machine in >order to learn how it worked. (I was thinking the other day that I wished >I had one of them now, in fact, just for sentimental reasons!) I've been looking for a cheap, non-operational '8' in a 'desktop' cabinet. I intend to gut the box, put legs on it, and mount a lamp sticking up from the middle of the top. It'll make a fine floor lamp for my computer room. (My computer room already has an IBM 360/50 front panel hanging on the wall --- 1960's industrial art!) -- ------------------------------------------------------------------------- John Hall Supervisor, Software Tools Laboratory Product Software Engineering USPS: EASTMAN KODAK COMPANY, 901 Elmgrove Rd., Rochester, NY 14650 VOICE: 716 726-9345 UUCP: {allegra, seismo}!rochester!kodak!ektools!john ARPA: kodak!ektools!john@rochester.ARPA
asgard@well.UUCP (J. R. Stoner) (03/11/86)
> [much heartfelt nostalgia about the PDP-8 instruction set]
Ah yes, the PDP-8.
At the tender age of 15 I was given the administrative duties over the
PDP-8/E running in a math club lab at my high school. I really liked working
with this machine as the instructions were simple to understand, although
I never quite reconciled (sp?) myself with the addressing scheme of the
machine. For instance, if I did not have PAL8 to do the hard stuff I
would be *more* brain-damaged than I am now :-)
All memory references outside a 128 word range were memory indirect, which
took up one word out of the 128 and (you get the drift).
This actually led to one of the nicest features of the PDP-8. You could
specify an indirect bit for any of the memory operate instructions.
My favorite game was to use a random number generator to specify an
address for an ISZ I <memory> instruction to see how many memory cycles
would run until the machine crashed (a high school game and I was the only
user, so I got to have a lot of fun).
My other fun is something I *never* figured out. Maybe somebody in
netland would educate me as to the finer points. None of my programs
ever exceeded the basic 4K core size. This was fine when running EDU-20.
However, in later years we also got OS/8, which ran in an 8K system.
I have not ever got the hang of how those funny IOT instructions for
extra memory worked (I saw a lot of "CIF CDF 10" instructions in the
disassembly of the CCL).
As we had to switch from EDU-20 to OS/8 quite often and we did not have
the autoload ROM I had the task of bit-flipping the OS/8 loader by hand
every time for a switch (EDU was loaded by OS/8). I did that so many
times that I can still recite the loader after 13 years.
(Lets see... 7126 1060 6751 1061 4053 4053 7024 6755 ...)
I mean that was *easy* and quite fun if you wanted to impress the
frosh.
--
From the mania of:
J. R. (May the farce be with you) Stoner, Esq.
olsen@ll-xn.ARPA (Jim Olsen) (03/11/86)
A note of interest to those of us who knew and loved (:-)) the PDP-8: DEC is still making them! The 'DECmate' word processor is based on a microprocessor version of the PDP-8. (You can even run OS/8 on it.) -- Jim Olsen ARPA:olsen@ll-xn UUCP:{decvax,lll-crg,seismo}!ll-xn!olsen
hansen@mips.UUCP (Craig Hansen) (03/12/86)
> I never quite reconciled (sp?) myself with the addressing scheme of the > machine. For instance, if I did not have PAL8 to do the hard stuff I > would be *more* brain-damaged than I am now :-) > All memory references outside a 128 word range were memory indirect, which > took up one word out of the 128 and (you get the drift). > My other fun is something I *never* figured out. Maybe somebody in > netland would educate me as to the finer points. None of my programs > ever exceeded the basic 4K core size. > I have not ever got the hang of how those funny IOT instructions for > extra memory worked (I saw a lot of "CIF CDF 10" instructions in the > disassembly of the CCL). > J. R. (May the farce be with you) Stoner, Esq. If you relied on PAL8 to generate off-page references for you, I'm not surprised that you never got the hang of EMA addressing. CDF causes all INDIRECT references to fetch the referenced data from the specified field. Direct references, and indirect pointers are always retrieve from the current instruction field. CIF causes the next JMP or JMS instruction to change the instruction field. CIF CDF together (remember that the low-order three bits or an IOT cause up to three separate IOP pulses on the early eights) was a common way to branch to subroutine in another field. The JMS would store the low-order 12 bits of the return address, and the value of the current data field when the subroutine is entered is both the field to get immediate data (placed after the JMS) and the field to return to. As you can guess by this point, letting PAL8 generate off-page links in this environment is dangerous at best. Craig Hansen MIPS Computer Systems ...decwrl!glacier!mips!hansen
bmw@aesat.UUCP (Bruce Walker) (03/14/86)
In article <283@ll-xn.ARPA> olsen@ll-xn.ARPA (Jim Olsen) writes: > A note of interest to those of us who knew and loved (:-)) the PDP-8: > DEC is still making them! The 'DECmate' word processor is based on a > microprocessor version of the PDP-8. (You can even run OS/8 on it.) > -- > Jim Olsen ARPA:olsen@ll-xn UUCP:{decvax,lll-crg,seismo}!ll-xn!olsen For those of us masochistic enough to even bother with these early RISC machines, the microprocessor in the DECmate is made in a CMOS process by Harris Semiconductor Corp. and is called the HM6120. It is an architectural extension of the PDP8/e (runs all old code) with two stack pointer registers added (and a few other ying-yangs). If you add an HD6102 MEDIC (Memory Extension & DMA Interface Controller) chip, you can have the FULL (yes folks!) 32K words of memory and a DEC-compatible DMA port. The "original" CMOS PDP8/e is still made by Intersil (since about 1975-6) as the IM6100, and a little kit of parts (processor, UART, 256 words ram, 1K words of rom) can be bought for ~$70 (CAN.) that runs a faithful reimplimentation of ODT. Hmmm, let's see, all I need now is a paper tape reader ... Egads! Do you know it costs less to buy a 10M hard disk than a paper tape reader these days?!? Bruce Walker {allegra,ihnp4,linus,decvax}!utzoo!aesat!bmw "I'd feel a lot worse if I wasn't so heavily sedated." -- Spinal Tap
henry@utzoo.UUCP (Henry Spencer) (03/15/86)
> The PDP8 has an interesting peripheral : a 'parallel' > processor - the FPP12 floating point processor with its own instruction > set, program counter and accumulator... > ... A nice system for doing real time I/O (via the CPU) and > number crunching (FPP)... It was more than that, in fact. The FPP was a much better processor than the PDP8! It had index registers. It had uniform 15-bit memory addresses rather than 3+12 bits. It could do integer arithmetic as well as floating- point, and as I recall could do 24-bit integers. (If you think 32 is an improvement over 16, try 24 versus 12!) The one thing it couldn't do was I/O; for pretty nearly everything else, it was *better* than its host! In fact, the very late PDP8s acknowledged this by having an instruction that would stop the PDP8 itself until an interrupt occurred, so that the FPP could use the full memory bandwidth. > (If only 32k memory was enough!) 16K was a lot of memory on a PDP8... Our lab had to fight tooth and nail to get 16K accepted as our official configuration, so that the software could rely on it. Before that, we routinely worked with 8K. -- Henry Spencer @ U of Toronto Zoology {allegra,ihnp4,linus,decvax}!utzoo!henry
zemon@fritz.UUCP (Art Zemon) (03/21/86)
The PDP-8 not only lives, it refuses to die. I have a real, honest to goodness, still WORKING, original Digital Equipment Corporation PDP-8 in my den. For those of you who are religiously familiar with the 8 line, this is simply a PDP-8, not an 8L or 8E or anything. For the rest of you, this is what a "real" computer is like: The PDP-8 predates integrated circuits. It is made of about a zillion Flip-Chips (TM or something by DEC) each housing gobs of discrete transistors, diodes, and other goodies. For example, the accumulator is made up of twelve double Flip-Chips, each implementing one BIT! Each one of these boards is roughly one half the size of a normal CRT screen. The PDP-8 has a box roughly ten inches cubicle which contains four kilowords of core. Now this is not four kilobytes nor is it eight nor is "core" a euphemism. The 8 has 4096 twelve bit words of real magnetic doughnuts with wires strung through them. This stuff, if my memory serves, cycles at the blinding speed of 1.5 milliseconds. Physically, this machine is straight out of a science fiction flick. It is about three feet cubicle with the top two feet covered with smoked Plexiglass. The bottom foot of the front panel has a row of toggle switches all the way across it and enough lights (incandescent, not LEDs) to keep Santa happy. But the best part is turning it on when the gas is out on a cold winter night. It blithely consumes 780 watts of power and the six fans swirl it around the entire house just fine. But they don't blow the thing over; it weighs in at 250 pounds. If you compare the "Classic-8" to one of these new fangled 68020s or RISC machines, you'll have to agree. For sheer presence and class, the PDP-8 is unsurpassed in the Mini- Computer market. Beg to differ? Lets try a little contest. You put your computer on top of mine for an hour and well see if my PDP-8 still runs. Then.... Cheers, -- -- Art Zemon FileNet Corp. ...! {decvax, ihnp4, ucbvax} !trwrb!felix!zemon
cdl@mplvax.ARPA (Carl Lowenstein) (03/24/86)
In article <465@fritz.UUCP> zemon@fritz.UUCP (Art zemon) writes: >The PDP-8 not only lives, it refuses to die. > >discrete transistors, diodes, and other goodies. For example, >the accumulator is made up of twelve double Flip-Chips, each >implementing one BIT! > >The PDP-8 has a box roughly ten inches cubicle which contains >four kilowords of core. >This stuff, if my memory serves, cycles at the blinding speed of >1.5 milliseconds. -- carl lowenstein marine physical lab u.c. san diego {ihnp4|decvax|akgua|dcdwest|ucbvax} !sdcsvax!mplvax!cdl
cdl@mplvax.ARPA (Carl Lowenstein) (03/24/86)
In article <268@mplvax.ARPA> cdl@mplvax.UUCP (Carl Lowenstein) writes: >In article <465@fritz.UUCP> zemon@fritz.UUCP (Art zemon) writes: >>The PDP-8 not only lives, it refuses to die. >> >>discrete transistors, diodes, and other goodies. For example, >>the accumulator is made up of twelve double Flip-Chips, each >>implementing one BIT! > These are nowadays called bit slices.> > >> >>The PDP-8 has a box roughly ten inches cubicle which contains >>four kilowords of core. >>This stuff, if my memory serves, cycles at the blinding speed of >>1.5 milliseconds. > That's 1.5 *micro*seconds which is not too bad for 1963 technology.> > I don't understand how my first attempt got out without the added comments. Sorry about that. -- carl lowenstein marine physical lab u.c. san diego {ihnp4|decvax|akgua|dcdwest|ucbvax} !sdcsvax!mplvax!cdl
tuba@ur-tut.UUCP (Jon Krueger) (03/26/86)
In article <465@fritz.UUCP> zemon@fritz.UUCP (Art zemon) writes: >The PDP-8 has a box roughly ten inches cubicle which contains >four kilowords of core. Now this is not four kilobytes nor is >it eight nor is "core" a euphemism. The 8 has 4096 twelve bit >words of real magnetic doughnuts with wires strung through them. >This stuff, if my memory serves, cycles at the blinding speed of >1.5 milliseconds. It cycles at 1.5 microseconds. Let's not exaggerate.