[net.arch] 8087 Bug ?

magore@watdcsu.UUCP (M.A.Gore - ICR) (05/01/86)

	I am tracking down what *i think* to be a problem with
the 8087 Numeric Processor. I am posting this with a test program
in hopes that others can verify the 'bug'. The chip I tested
has markings C8087-3 (c) Intel 1980, 1981, I3320026, 1983 Malaysia.
Chip Speed is 14.7456Mhz / 3.

Symptom:
	If the 8087 is running a save or load instruction using memory
when it fetches a NO-WAIT save or load instruction the processor
stops dead asserting S2=1,S1=0,S0=0 (MEMORY READ) and *NEVER* exits
the memory read cycle.  While running two such instructions *without*
an intervening wait is clearly a software bug I am intrigued that
It would crash ( I would expect an invalid operation exception).

Background:
	I was trying to take advantage of concurrent 8087/8086 operation...
I just got too clever |:-)

Tests:
	The *same* 8087 was tried on a IBM/XT with 8088, and in a 8086
system running xenix 2.3 (the latter hand coded object coded). Both
failed. However the test worked on a 80286/80287 xenix 3.0 system. I think
the 80287 this is due to inherent syncronization.
The 8087 was tested cold right (fresh from the freezer) and after several
days of use. This 8087 works quite well other then this problem.
Though was given to buss master arbitration causing conflicts with the
8086/8087 local buss. This does not seem to be the problem.

Please send results or tests by *E-mail*. I will post results if there
is more interest.

The Program follows:

There are two programs: fp.c and ftest.asm


/*
* 8087 test program by: Mike Gore
*/
main()
{
	ftest();
	printf("I lived!\n");
}

; Microsoft 2.00 assembler format
	.8087
data    segment byte public 'data'
dac1    dq      0.0
save    dw      0
data    ends

pgroup  group prog
prog    segment byte public 'prog'
assume  cs:pgroup
assume  ds:data

; FTEST
;       Show that overlapping of No-Wait memory load and stores
;       can hang the local bus.

	public  ftest
ftest   proc    near
	push    si

	fninit  ; Soft initialize.
	fwait   ; Wait untill done (post wait)
; RC = Rounding Control (Chop toward 0), PC = Precision Control (64 Bits)
	mov     save,0fbfh      ; Mask ALL exceptions, PC=3,RC=3
	fldcw   save
	fwait   ; (post wait)

; Do 4 Load and Store operations (No Wait form!,... hand coded)
	mov     si,offset dac1

; fld 64 bit real into st(0), No wait!
; ESCAPE MF 1, MOD 0 0 0 R/M
;       ESCAPE =        0d8h    5 bits
;       MF =            002h    2 bits
;       MOD =           000h    2 bits
;       R/M =           000h    3 bits
	db              0ddh,004h

; fst 64 bit real from st(0), No pop, No wait!
; ESCAPE MF 1, MOD 0 1 0 R/M
;       ESCAPE =        0d8h    5 bits
;       MF =            002h    2 bits
;       MOD =           000h    2 bits
;       R/M =           000h    3 bits
	db              0ddh,01ch

; fst 64 bit real from st(0), No pop, No wait!
; ESCAPE MF 1, MOD 0 1 0 R/M
;       ESCAPE =        0d8h    5 bits
;       MF =            002h    2 bits
;       MOD =           000h    2 bits
;       R/M =           000h    3 bits
	db              0ddh,01ch

; fld 64 bit real into st(0), No wait!
; ESCAPE MF 1, MOD 0 0 0 R/M
;       ESCAPE =        0d8h    5 bits
;       MF =            002h    2 bits
;       MOD =           000h    2 bits
;       R/M =           000h    3 bits
	db              0ddh,004h

	fwait   ; (post wait)
; We should be frozen before this point 8087 S2=1,S1=0,S0=1 (READ MEMORY)
; The 8086/8087 Local bus is now 'dead' in a mid-memory read!

	pop     si
	ret
ftest   endp
prog	ends
	end