mnl@cernvax.UUCP (mnl) (05/10/86)
I was going through old Communications of the ACM looking for interesting
articles, and I found the January, 1978 issue, which has a special section
on computer architecture, including an article on the Cray-I. On page 71,
under the heading "Front-End Computer Interface", it says:
Cray Reseaaarch software development is currently being done
using a Data General Eclipse computer [as a front end]. The
Cray Research "A" processor, a 16-bit, 80 MIPS minicomputer
^^^^^^^
is scheduled to replace the Eclipse in early 1978.
Does anyone know what happened with this machine? I assume that it
was a Cray-I stripped of the vector and floating point hardware, and
maybe also lacking multiply (Can you say RISC? I knew you could.)
I suppose it probably died because it was too expensive, and due to
a lack of software, since Un*x wasn't the obvious choice for an
operating system in 1978 that it is now, and I don't think Cray
Research had the resources to write their own mainstream operating
system.
--
Mark Nelson
mnl@cernvax.bitnet or ...!seismo!mcvax!cernvax!mnl
"This function is occasionally useful as the arguement to a function
which requires a function as an arguement." Guy Steelebrooks@lll-crg.ARpA (Eugene D. Brooks III) (05/11/86)
In article <310@cernvax.UUCP> mnl@cernvax.UUCP (Mark Nelson) writes: >I was going through old Communications of the ACM looking for interesting >articles, and I found the January, 1978 issue, which has a special section >on computer architecture, including an article on the Cray-I. On page 71, >under the heading "Front-End Computer Interface", it says: > > Cray Reseaaarch software development is currently being done > using a Data General Eclipse computer [as a front end]. The > Cray Research "A" processor, a 16-bit, 80 MIPS minicomputer > ^^^^^^^ Take a look at the Cray 2, there are 4 back end processors which have the full Cray 2 instruction set. The front end cpu is a stripped instruction set job that probabably evolved from this work.
bjr@alliant.UUCP (Josh Rosen) (05/14/86)
I don't know what became of this machine, but the rumor at the time (at least at DG) was that the Cray front end processor was going to be a 6 nsec NOVA. The NOVA was the predessor to the ECLIPSE and had a very RISC like instruction set.
jhf@lanl.ARPA (Joseph Fasel) (05/15/86)
> I was going through old Communications of the ACM looking for interesting > articles, and I found the January, 1978 issue, which has a special section > on computer architecture, including an article on the Cray-I. On page 71, > under the heading "Front-End Computer Interface", it says: > > Cray Reseaaarch software development is currently being done > using a Data General Eclipse computer [as a front end]. The > Cray Research "A" processor, a 16-bit, 80 MIPS minicomputer > ^^^^^^^ > is scheduled to replace the Eclipse in early 1978. > > Does anyone know what happened with this machine? I assume that it > was a Cray-I stripped of the vector and floating point hardware, and > maybe also lacking multiply (Can you say RISC? I knew you could.) > -- > Mark Nelson > mnl@cernvax.bitnet or ...!seismo!mcvax!cernvax!mnl The A processor evolved into the I/O processor (IOP) of the Cray 1-S and Cray X-MP. -- Joe Fasel jhf@lanl.{arpa,uucp}
jhf@lanl.ARPA (Joseph Fasel) (05/22/86)
Allen Baum was apparently unable to post news from host "apple", and asked me to post the following for him: ----------------------------------------------------------------------- The CRAY A-machine that is used in the I/O processor of the Cray-X/MP is a 16-bit machine with 128 instructions. There is an accumulator, an index register, 512 operand registers, and 64K words of local memory. More than a quarter of the opcodes are unconditional and conditional branches/calls(returns?) of various flavors. The only branch conditions are Carry=0, Acc.=0, and their inverses. There appears to be a 16 deep return stack, but I'm not sure how its used. Another quarter of the opcodes are I/O channel functions of the form: Do function N on channel C (C can be the contents of a reg or a literal). There are a few control instructions, and the remaining instructions are the arithmetic/logical class. The operations are simple: +,-, inc, dec, and, move, and shifts. The addressing modes are simple: immediate, operand reg. direct, operand reg. indirect (thru index reg), and local memory indirect (thru operand regs.) Instructions are mostly 16 bit, with a few 32 bit (includes 16bit immediate field). Allen Baum, Apple Computer