[net.arch] What's RISC all about ... REALL

aglew@ccvaxa.UUCP (07/31/86)

>Hmmm.  It just occurred to me that the speed of main memory is a big
>factor in the opcode/microcode trade-off.  Could Vaxen have been designed
>with much slower main memory in mind?  (Or faster cache?)
>		Ronald O. Christian (Fujitsu America Inc., San Jose, Calif.)
>		seismo!amdahl!fai!ronc  -or-   ihnp4!pesnta!fai!ronc

The cost (both in dollars and in space) of memory also plays a factor.
I have a card (an old punch card - I scrounged several boxes when the site
I was working at finally threw out the keypunches) on my wall with this on
it:

    WOW! In the early 1970s, 8K of ROM = 8 bits of register.
    What a reason for microcode! [from one of Patterson's papers]

I'm waiting for this to happen again, probably in the early days of
optical computers.

Of course, you can always execute microcode from RAM...

Andy "Krazy" Glew. Gould CSD-Urbana.    USEnet:  ihnp4!uiucdcs!ccvaxa!aglew
1101 E. University, Urbana, IL 61801    ARPAnet: aglew@gswd-vms