jeff1@garfield.UUCP (02/11/86)
We are currently designing a RISC chip and are wondering how few addressing modes we can get away with. Right now we have register direct and register indirect. The question is, is this enough? What do people as programmers and/or designers think is a minimum set of addressing modes? We can get away with just these two (I hope!), but doing some things requires a lot of convoluted code. I guess followups should go to net.arch, just to keep them all in the same place. Jeff Sparkes jeff1%garfield.mun.cdn@ubc.csnet <- preferred route {allegra,seismo,psuvax1,utcsri}!garfield!jeff1 (I don't trust ihnp4 any more)