b-davis%utah-cs@sri-unix.UUCP (07/20/84)
From: b-davis@utah-cs (Brad Davis) The new instructions on the 186 include: PUSH immediate PUSHA ; push all registers POPA ; pop all registers IMUL immediate ; machine encoding implies memory, register, ; immediate data (don't know any more) SHIFTs,ROTATEs count ; example SAR MEM,4 INS OUTS ; both can be REPeated ENTER frmsiz,lexlevl LEAVE ; for allocating stack frames BOUND reg,memory ; check reg against bounds in memory,memory+2 The new instructions on the 286 include: all the instructions on the 186 CTS ; clear task switched flag LGDT memory ; load global descriptor table register SGDT memory ; store global descriptor table register LIDT memory ; load interrupt descriptor table register SIDT memory ; store interrupt descriptor table register LLDT memory ; load local descriptor table register SLDT memory ; store local descriptor table register LTR memory ; load task register STR memory ; store task register LMSW memory ; load machine status word SMSW memory ; store machine status word LAR memory ; load access rights LSL memory ; load segment limit ARPL memory ; adjust requested privlege level VERR memory ; verify read access VERW memory ; verify write access Calls, returns, and interrupts have different timming if used in protected mode than if used in compatability mode. Clock counts for each instruction are typically half of the 186. Like the 186 no extra overhead is incurred for address calculations. The 186 is from the same speed as an 8086 (MOVs) to 3-4 times faster (MULs, DIVs). Claims from companies that make 286 plug in boards for the current PCs are 4 to 10 times faster than the PC. Too bad that the 287 isn't 2-4 times faster than the 8087. Brad Davis