[net.micro.pc] 286 slower than 8086?

gnu@sun.uucp (John Gilmore) (09/25/84)

I have seen some claims (by Motorola, but you could ask your Intel rep)
that the 286 has rather horrendous overhead for loading segment
descriptors, such that "large model" code, which must load a segment
register for every access to an element of a larger-than-64K data
segment, indeed runs an order of magnitude slower than "small model"
code.  In the 8086 the "large model" only ran 2-3x as slow, since it
took more instructions but the load-segment-register instructions were
not slow.  Of course you can run your 286 in 8086 mode if you want
to throw away all the features but regain some speed.

My 286 manual is missing (plus I don't have a compiler that generates
large model 8086 or 286 code) -- but can someone with these resources
please check and let us know?  Intel did a lot of lying in their
anti-Motorola ads, I'd like to see if Motorola has lowered themselves
to similar tactics, or whether Intel really made a blunder of this size.

johnl@cca.UUCP (10/01/84)

#R:sun:-170700:ima:12700002:000:498
ima!johnl    Sep 30 15:11:00 1984

It's true.  Loading a 286 segment register in protected mode is very slow.
According to my handy 286 manual, "MOV ES,AX" would take 2 cycles in real
(8086-like) mode but 17 cycles in protected mode.  That's because it has
to load four bytes out of the descriptor table to find out what the new
contents of the segment register actually mean.  Looks like a big loss if you're
trying to simulate a linear address space 'cause your data doesn't naturally
fall into 64K chunks.

John Levine, ima!johnl