henry (03/24/83)
My thanks to Tom Lovett for elaborating on my description of the 68000's internal bus structure. My information was based on a fairly sketchy overview article, and one I read quite some time ago at that. Does anybody know whether the 68020 is going to be a major internal reimplementation, or whether Motorola is just going to graft a 32-bit bus interface onto the existing more-or-less-16-bit cpu? I fear it may be the latter, which would undoubtedly improve the overall throughput to some extent (in much the same way as a cache, by improving memory bandwidth) but wouldn't have quite the crunch of something that actually did 32-bit arithmetic 32 bits at a time. Henry Spencer U of Toronto