gottlieb@cmcl2.UUCP (Allan Gottlieb) (11/08/83)
Consider a register to memory movl. Obviously two bus cycles are required to send the data out of the processor. Is there some written guarentee as to which word is stored first? Analogous questions arise for a memory to register movl and for memory to memory versions. Thanks in advance Allan Gottlieb NY Univ. ARPA: GOTTLIEB@NYU uucp: {floyd,research,harpo}!cmcl2!gottlieb