[net.micro.68k] Inconsistent bit addressing in the 6

mwm@ea.UUCP (09/05/84)

#R:turtleva:-49100:ea:7400006:000:1582
ea!mwm    Sep  4 18:42:00 1984

/***** ea:net.micro.68k / hcrvax!hugh /  9:46 pm  Sep  1, 1984 */
Randy Buckland says the VAX is entirely little-endian.  If you look at
the floating point format, it seems to be middle-endian or something:

Perhaps the reason is that in changing the precision of integers, the low order
bits are important (in narrowing, you pray the high order bits are the same;
in widening you make them so), whereas in floating point, the high order
fraction bits are the important ones.
/* ---------- */

Uh - maybe the reason they did the floats that way was because they wanted
to be able to run PDP-11 code, which also does them that way?

As for the "important" high order bits, the VAX layout looks like:

	|16 bit fraction|S|8 bit exp|7 bit fraction|
						/
and is addressed at this end ------------------/

This gives you the high seven bits of the fraction, and the low bit of the
exponent, in the high order byte. There is no easy way to grab the exponent
(far more important than the high order bits of the fraction!). This
looking like a botch at first glance is easily explainable - if they didn't
need the PDP-11 compatibility, it *is* a botch.  [On the PDP-11, there is
no obvious reason to make the words go either way. Anyone know why they did
it?]

As for the "orthogonality" of the VAX architecture, I suggest you look at
the architechture before DEC added the warts: the PDP-11.

	<mike

Notes: Information from "pdp11/70 processor handbook" and "VAX-11
Achitecture Reference Manual." Typos & misinterpretations are entirely my
fault. The contents are to be blamed on DEC.