hardy@sdcsvax.UUCP (Jeff Hardy) (01/22/85)
I have been studying the manual for the new MC68020 microprocessor briefly, and ran across some behaviour that seemed strange to me and was wondering how the rest of the net community perceived this behaviour. The '20 has an interrupt stack that is seperate from the supervisor and user stacks. This idea seems good by itself in that global operations such as interrupts will not interfere with process local operations that are occurring on either the supervisor stack or the user stack. The strange behavior that I have noted is in the stacking of the exception frame when the processor is currently using the supervisor stack, and an interrupt occurs. The '20 stacks the exception frame on the CURRENT stack (read supervisor stack), switches to the interrupt stack, and then stacks the exact same stuff on it, with the exception of the stack frame type word which describes this behaviour. It then uses the interrupt stack for the duration. If another interrupt occurs, it is handled on the interrupt stack with no strangeness. It seems to me that a preferred manner of handling interrupts would be to have the exception frame be placed in the interrupt stack, not the supervisor stack. I can see no reason why the '20 handles things in this manner. On reason that I first thought was that it provided a link back to the old stack frame, but since the current stack pointer can be determined by bits in the status register, and the status register is pushed as part of the exception frame, it would be a simple matter to pop the exception frame from the current stack on an rti, and use the status bits to figure out which stack pointer to use from then on. Will any one who sees a legitimate reason for the '20 handling the exception frame in this manner please let me know. Thanks! Jeff Hardy ..!sdcsvax!hardy