[net.micro.68k] Why no INC or DEC

gjk@talcott.UUCP (Greg Kuperberg) (01/20/85)

Why doesn't the 68000 have increment or decrement instructions?  I know
that the 68000 was designed (at least to some degree) with the spirit of
RISC, but INC and DEC are actually quite simple, and useful, instructions.
---
			Greg Kuperberg
		     harvard!talcott!gjk

"Nice boy, but about as sharp as a sack of wet mice." - Foghorn Leghorn

chris@umcp-cs.UUCP (Chris Torek) (01/20/85)

With ``addq'' there's no need for an increment: just addq #1,d0 or
whatever.  In fact, you have a whole bunch of increments, #1 to #8,
if I recall correctly....
-- 
(This line accidently left nonblank.)

In-Real-Life: Chris Torek, Univ of MD Comp Sci Dept (+1 301 454 7690)
UUCP:	{seismo,allegra,brl-bmd}!umcp-cs!chris
CSNet:	chris@umcp-cs		ARPA:	chris@maryland

guy@rlgvax.UUCP (Guy Harris) (01/20/85)

> Why doesn't the 68000 have increment or decrement instructions?

An INC or DEC instruction would take one word to specify the opcode, size,
and address mode/register, and an extra word for any offset, if any.
This is exactly as many words as ADDQ #1,<operand> or SUBQ #1,<operand>
would take - so it has a more general form of INC and DEC (you can increment
or decrement by any value from 1 to 8 (ADDQ #0 is useless, so the instruction
adds 1+<3 bits from instruction> - easy to do by just jamming the input
carry bit high in the adder).

> I know that the 68000 was designed (at least to some degree) with the
> spirit of RISC,

Say what?  Yes, its instruction set is smaller than the VAXes, but then
so is the instruction set of a PDP-11 or IBM 370 (excluding microcode assists,
etc.).

	Guy Harris
	{seismo,ihnp4,allegra}!rlgvax!guy

gjk@talcott.UUCP (Greg Kuperberg) (01/21/85)

> Why doesn't the 68000 have increment or decrement instructions?
...
> 			Greg Kuperberg

And the answer is (thanx for all the replies) that you can use ADDQ and
SUBQ, since those instructions only take up one word.  Nevertheless, I
wince when I see "ADDQ #1,D0", even if it does have a Q in it.  I claim
this is a natural tendency, since this kind of thing really is inefficient
on other CPU's.  I advise making an INC and DEC macro if you also have this
tendency.
---
			Greg Kuperberg
		     harvard!talcott!gjk

"Nice boy, but about as sharp as a sack of wet mice." - Foghorn Leghorn

breuel@harvard.ARPA (Thomas M. Breuel) (01/21/85)

> wince when I see "ADDQ #1,D0", even if it does have a Q in it. I claim
> this is a natural tendency, since this kind of thing really is inefficient
> on other CPU's.  I advise making an INC and DEC macro if you also have this
> tendency.

"ADDQ" makes sense on a 68000, since you have to increment not only by 1
(for pointers to bytes), but also by 2 and 4 (for pointers to words and
longwords respectively). "INC" and "DEC" are anachronisms from processors
like the Z80.

I would actually recommend you to leave out the "Q" in the instruction.
MOTOROLA assemblers and compatibles automatically use the shortest
instruction possible, and assembly language listings look a lot nicer if
they are not cluttered with instruction modifiers.

						Thomas.

mwm@ucbtopaz.CC.Berkeley.ARPA (01/22/85)

In article <246@talcott.UUCP> gjk@talcott.UUCP (Greg Kuperberg) writes:
>> Why doesn't the 68000 have increment or decrement instructions?
>
>And the answer is (thanx for all the replies) that you can use ADDQ and
>SUBQ, since those instructions only take up one word.  Nevertheless, I
>wince when I see "ADDQ #1,D0", even if it does have a Q in it.  I claim
>this is a natural tendency, since this kind of thing really is inefficient
>on other CPU's.  I advise making an INC and DEC macro if you also have this
>tendency.
>			Greg Kuperberg
>		     harvard!talcott!gjk
[Excuse me while I retch.]

Rather than having an INC & DEC macro, how about getting a smart assembler
that know that "ADD #n,D0" can be turned into an ADDQ instruction for
small n? That way, you get some measure of orthogonality in the source.
If you have a natural preference for such, I advise you to do so.

	<mike

darryl@ISM780.UUCP (01/22/85)

Although there are no instructions with mnemonics 'inc' or 'dec', there are
the addq and subq (add or sutract quick) instructions.  They allow adding
or subtracting values in the range [1,8], which is just the thing when
advancing a pointer through consecutive array elements.  They both occupy
1 (16 bit) word (exclusive of address displacements), so they are just as
compact as they can be.

	    --Darryl Richman, INTERACTIVE Systems Inc.
	    ...!cca!ima!ism780!darryl
	    The views expressed above are my opinions only.

rpw3@redwood.UUCP (Rob Warnock) (01/22/85)

+---------------
| Why doesn't the 68000 have increment or decrement instructions?  I know
| that the 68000 was designed (at least to some degree) with the spirit of
| RISC, but INC and DEC are actually quite simple, and useful, instructions.
| 			Greg Kuperberg |      harvard!talcott!gjk
+---------------

It DOES! They're just not called that. Try looking at ADDQ and SUBQ (add and
subtract "quick"). These are opcodes that can increment/decrement from one
to eight. The constant (1-8) is buried in the op code. Much more useful than
just INC and DEC, especially for stepping address pointers to bigger things
than bytes. They work with any destination: data reg, address reg, memory;
with byte, word, or long (except no byte adds to address regs).


Rob Warnock
Systems Architecture Consultant

UUCP:	{ihnp4,ucbvax!dual}!fortune!redwood!rpw3
DDD:	(415)572-2607
USPS:	510 Trinidad Lane, Foster City, CA  94404

dan@digi-g.UUCP (Dan Messinger) (01/23/85)

In article <242@talcott.UUCP> gjk@talcott.UUCP (Greg Kuperberg) writes:
>Why doesn't the 68000 have increment or decrement instructions?  I know
>that the 68000 was designed (at least to some degree) with the spirit of
>RISC, but INC and DEC are actually quite simple, and useful, instructions.

Have you noticed the ADDQ and SUBQ instructions?  These are single word
instructions that do a quick add/subtract of a 1 to 8 constant.  The
constant is kept in a 3 bit field that most other instructions use
to specify a register.  A special INC/DEC by 1 instruction could use
no less code space, and probably execute no faster.  So (in my opinion),
the 68000 has instructions superior to INC/DEC.

Dan Messinger
Digigraphic Systems Corp.
ihnp4!umn-cs!digi-g!dan