geoff@desint.UUCP (Geoff Kuenning) (01/28/85)
In article <142@redwood.UUCP> rpw3@redwood.UUCP (Rob Warnock) writes: >| The 68010 and 68020 are ALMOST capable of supporting hypervisors. >| Unfortunately there is one thing you can't simulate: RTE (Return >| from Exception) into the middle of an instruction as a bus error >| recovery. >Actually, John, I think you CAN simulate the RTE, it's just messy. You have >to [know how to emulate the microcode for the RTE]... But do we really need to do all this? The software is permitted to change only certain limited fields in the saved state; the format of the other stuff isn't even documented, and may conceivably vary from rev to rev of the chip (I seem to remember this was a problem with somebody's multiprocessor 68010 system). When the VM gets a bus error, save the state vector someplace internally. Then, when it does an RTE, find the matching state vector and do a comparison, allowing for changes only in legal places. If there is a problem, simulate a format exception in the VM. P.S. I am moving this discussion to net.micro.68k, since that seems to be a more reasonable place than unix-wizards. -- Geoff Kuenning Unix Consultant ...!ihnp4!trwrb!desint!geoff