louie@umd5.UUCP (03/14/85)
Hello! I've got a little project going on at home with a Motorola
68000 Educational Computer Board. This is a single board 68K with
32K bytes of 4116 type memories, organized as 16K x 16bits. The 68K
is running at 4MHz.
I find that I need more than 32K of memory, and have been considering
adding 128K (16 4164 devices). I can't replace the existing 32K of
memory since it runs from 0x0000 to 0x7FFF, and there is a ROM monitor
addressed starting at 0x8000. It doesn't seem practical to use the
existing dynamic RAM refresh logic and address multiplexors. I was
considering a design using the Intel 8203 dynamic RAM controller. Is
this a good idea? Are there any alternatives that I should look into?
--
--
Louis A. Mamakos WA3YMH University of Maryland, Computer Science Center
Internet: louie@umd5.arpa
UUCP: {seismo!umcp-cs, ihnp4!rlgvax}!cvl!umd5!louiejchapman@watcgl.UUCP (john chapman) (03/16/85)
> Hello! I've got a little project going on at home with a Motorola > 68000 Educational Computer Board. This is a single board 68K with > 32K bytes of 4116 type memories, organized as 16K x 16bits. The 68K > is running at 4MHz. > > I find that I need more than 32K of memory, and have been considering > adding 128K (16 4164 devices). I can't replace the existing 32K of > memory since it runs from 0x0000 to 0x7FFF, and there is a ROM monitor > addressed starting at 0x8000. It doesn't seem practical to use the > existing dynamic RAM refresh logic and address multiplexors. I was > considering a design using the Intel 8203 dynamic RAM controller. Is > this a good idea? Are there any alternatives that I should look into? > -- > -- > Louis A. Mamakos WA3YMH University of Maryland, Computer Science Center The 8203 is very easy to design with and does just about everything you would want; it is, however, slow - a board designed with 150ns drams will probably end up with a board access time of around 450ns. This may not be a problem in your case. I think the 8203 is a little bit easier to work with (takes care of more details) than other easily available chips I have seen. TI apparently has a similar chip but I don't know anything about it (if someone would post or mail me details on it I would be interested: thanks). John
lovedav@tekigm.UUCP (Dave Hiltner) (03/21/85)
In article <1476@watcgl.UUCP> jchapman@watcgl.UUCP (john chapman) writes: >> ... >> I was considering a design using the Intel 8203 dynamic RAM controller. >> Is this a good idea? Are there any alternatives that I should look into? >> -- >> -- >> Louis A. Mamakos WA3YMH University of Maryland, Computer Science Center > > The 8203 is very easy to design with and does just about everything > you would want; ... > > John We've recently been working on a couple of 68k implementations and have found that Signetics has intro'd a 74LS764 DRAM controller that is (or appears to be) VERY easy to use. It even generates DTACK for you, though some gating is advisable. It does early writes, and is dual ported. If someone is considering the Intel 8207 I definately recommend talking to your Signetics rep first. The "important" data is: Package, 40 pin Clock rate, <50MHz Refresh rate, x50 from Refresh Clock Drives up to 32 RAMs direct (except WE. Supplies gate signal, you supply R/W and any other gating necessary (like data strobe)). Works with 256k x 1 RAMs. Price, about $25 in quantity. Dtack is generated 4.5-5.5 Clocks after Request, and the cycle is complete at that time except for precharges. In the end, I guess I'd recommend this part, but this is not to be taken as an endorsement by TEKTRONIX or anybody else, maybe not even me. Hope this helps. Dave Hiltner, Tektronix, POB 3500, MS C1-972, Vancouver Wash., 98668. (tektronix!tekigm!lovedav)