brando@linus.UUCP (T. J. Brando) (10/30/85)
I am running four (4) Motorola MVME110-1 singleboards on a VMEbus backplane.
The VME110 in slot 1 is jumpered to serve as VMEbus controller. If the rate
at which each CPU requests the VMEbus is low enough, everything works fine.
If I increase the request rate sufficiently, eventually the CPU in slot 4
doesn't get the VMEbus within 200 us, its local bus timeout counter hits
bottom, and a bus error exception sequence is initiated. Fine. I can handle
that. That's what you'd expect to happen. However...
Here's a behavior I don't understand: All 4 CPUs experience bus errors.
This stops all processing, and gives control to a simple monitor/debugger on
each board (VMEbug 3.0). What I find is that a memory display command to
display memory available over the VMEbus generates a bus error on the boards
in slots 4, 3, and 2, but when I try the memory display on the board in slot 1
it succeeds, and if I go back to any of the other boards, the memory display
succeeds on them also!
Now if this isn't strange enough... sometimes the memory display on the board
in slot 1 also generates a bus error, in which case I have to reset the
backplane controller (and, therefore, the other 3 boards) before anyone can
execute the memory display successfully!
Does this make sense to anyone out there? I don't see how this could possibly
be caused by my program. It seems to me to indicate some problem with the
VMEbus arbiter on the controller board. Has anyone else had any experiences
similar to these? HELP!!!
Thom Brando linus!brando@MITRE-BEDFORD.{ARPA,BITNET,CSNET}
617-271-3156.NET {allegra,decvax,ihnp4,philabs,...}!linus!brando.UUCPthomas@kuling.UUCP (Thomas H{meenaho) (11/05/85)
Sorry to use a followup on this article as I haven't used these boards.
However I've encountered a problem with another Motorola board, the MVME 333
serial comm. board.
Has anyone successfully used this board with DMA transfers to-from the VME bus
when there's another board that is the current bus master?
When we looked at the bus activity during the transfers we noticed that
the MVME 333 board doesn't give a heck if there's another bus master in the
middle of a transfer, it just grabs the bus and tries to put out its own
bus signals. You can imagine the result, disaster!
It seems that Mot has done a mistake when they use the OWN signal from the
68450 DMAC as an input to the bus-requester. We pulled out that pin on the
bus-requster and tied it high and it works as nice as the processor cycles
on the bus.
Another problem with the bus-requester seems to be that once the board gets
the VME bus it wont let anyone else in until the board makes a local access, no
matter what priority levels one assigns to the boards.
--
Thomas Hameenaho, Dept. of Computer Science, Uppsala University, Sweden
Phone: +46 18 138650
UUCP: thomas@kuling.UUCP (...!{seismo,mcvax}!enea!kuling!thomas)