[net.micro.68k] 68020 analysis project

robin@oakhill.UUCP (Robin Edenfield) (08/29/86)

I am presently involved in a project a Motorola to look into improvements and
enhancements to the 68000 family architecture as exemplified by the 68020.
Consequently I have several questions to put to the net experts.

First I am interested in hardware monitors to help with our analysis of bus
activity.  Any pointers to companies that produce this type of equipment
or papers describing the the design and use of such equipment would be greatly
appreciated.

Secondly I am interested in instruction frequency and addressing mode usage
in 68020 systems.  I have read the VAX study done by Clark and Levy, but I
would like more specific information on 68020 systems, especially in regard
to addressing modes.  Any pointers to this type of information would be very
helpful in our analysis.  In addition, for you compiler experts and assembly
language programmers, what are your favorite addressing modes?

Also general systems information like frequency of exception processing and
frequency of page faults is also interesting so information of this type
is also requested.

Finally what improvements would you like to see in the 68020?  Since the next
generation processor is supposed to be upward compatible with the 68000
family, I am more interested tweaking type improvements such as adding a data
cache instead of radical departures from the 68000 family architecture such
as implementing 3 operand opcodes.  Please email your comments and information 
to me at oakhill!robin and thanks in advance.  BTW I will try to summarize to
the net if sufficient interest is expressed.

					Robin Edenfield