[net.unix] VAX instruction timings

rab@cdcvax.UUCP (Roger Bielefeld) (09/28/83)

The following VAX instruction timings were obtained from a former
DEC employee.  I cannot vouch for their accuracy and have no idea
how they were obtained.


  VAX-11/780 vs. VAX-11/750 vs. VAX-11/730 WITHOUT FPA
  INSTRUCTION			      <EXECUTION TIME MICROSECS> <TIMES 780>
					  780	  750	  730	 750	 730

INSERT AT TAIL + REMOVE FROM HEAD	 14.00	 15.07	 26.89	0.929	0.521
INTERLOCKED INSERT + REMOVE		 30.43	 26.43	 41.14	1.151	0.740
ADDF Reg, Reg				  2.21	  8.76	 39.95	0.252	0.055
MULF2 Reg, Reg				  5.63	 12.62	 36.34	0.446	0.155
SUBF Reg, Reg				  2.21	  9.29	 45.69	0.238	0.048
DIVF3 Reg, Reg, Reg			  8.49	 12.83	228.06	0.662	0.037
POLYF (4th order)			 38.59	 80.80	269.50	0.478	0.143
ADDD Reg, Reg				  9.44	 14.41	 61.85	0.655	0.153
MULD Reg, Reg				 27.74	 39.05	 89.47	0.634	0.277
SUBD Reg, Reg				  9.44	 14.72	 75.06	0.641	0.126
DIVD3 Reg, Reg, Reg			 43.80	 71.14	557.52	0.616	0.079
POLYD (4th order)			131.65	191.81	504.43	0.686	0.261
ADDG2 Reg, Reg				 14.46	 24.65	 64.41	0.587	0.224
MULG2 Reg, Reg				 29.57	 50.64	 92.39	0.584	0.320
SUBG2 Reg, Reg				 14.46	 25.28	 76.44	0.572	0.189
DIVG3 Reg, Reg, Reg			 52.85	 81.03	528.25	0.652	0.100
POLYG (4th order)			153.17	226.53	496.63	0.676	0.308
ADDH2 Reg, Reg				 27.53	 38.39	 98.60	0.717	0.279
MULH2 Reg, Reg				 85.21	155.54	286.06	0.548	0.298
SUBH2 Reg, Reg				 27.73	 38.60	122.43	0.718	0.226
DIVH3 Reg, Reg, Reg			223.00	350.96 1435.65	0.635	0.155
POLYH (4th order)			579.34	681.13 1255.15	0.851	0.462
ADDB Reg, Reg				  0.40	  0.94	  2.88	0.426	0.139
ADDW Reg, Reg				  0.40	  0.93	  2.69	0.430	0.149
ADDL Reg, Reg				  0.40	  0.93	  2.53	0.430	0.158
ADDL3 Reg, Reg, Reg			  0.60	  1.29	  2.88	0.465	0.208
ADDL #imed, Reg				  0.84	  1.69	  4.95	0.497	0.170
ADDL @Reg, Reg				  0.80	  1.11	  3.21	0.721	0.249
ADDL Reg, @Reg				  1.33	  1.61	  4.21	0.826	0.316
ADDL mem, mem				  1.72	  3.29	  9.54	0.523	0.180
ADDL B^disp(Reg), Reg			  0.80	  1.29	  3.73	0.620	0.214
ADDL (Reg)[Reg], Reg			  1.40	  1.82	  5.16	0.769	0.271
MOVL Reg, Reg				  0.40	  0.93	  1.71	0.430	0.234
MOVL mem, Reg				  0.84	  1.67	  4.80	0.503	0.175
MOVL Reg, mem				  1.31	  2.28	  4.88	0.575	0.268
CMPL AND BLEQ				  1.16	  2.32	  4.33	0.500	0.268
CMPL mem, Reg AND BLEQ			  1.88	  3.24	  7.42	0.580	0.253
TSTL AND BLEQ				  1.00	  2.42	  4.32	0.413	0.231
BRW					  0.80	  2.01	  2.61	0.398	0.307
MULL2 Reg, Reg				  6.43	  8.35	 17.33	0.770	0.371
MULL2 mem, Reg				  6.67	  9.13	 20.96	0.731	0.318
MULL2 Reg, mem				  6.65	  9.08	 20.73	0.732	0.321
DIVL3 Reg, Reg, Reg			  9.64	  8.88	 70.28	1.086	0.137
DIVL2 Reg, Reg				  9.44	  8.14	 66.99	1.160	0.141
DIVL mem, Reg				  9.68	  8.91	 74.83	1.086	0.129
BBS #22, Reg, disp			  1.40	  2.32	  5.17	0.603	0.271
BBCC #22, Reg, disp			  1.60	  2.90	  6.61	0.552	0.242
BBCCI #22, Reg, disp			  1.60	  2.90	  6.88	0.552	0.233
CALLS #0, ROUTINE + RET			 14.76	 20.87	 37.15	0.707	0.397
CALLG LIST, ROUTINE + RET		 13.88	 19.41	 36.78	0.715	0.377
CLRL Reg				  0.60	  1.00	  1.27	0.600	0.472
CLRQ Reg				  1.20	  1.32	  4.02	0.909	0.299
CMPC3 Reg, (Reg), (Reg) - 10 CHAR	 14.27	 26.48	 61.80	0.539	0.231
MOVC5 #0,(R1),#0,#512,BLOCK CLEAR MEM	111.42	142.40	151.12	0.782	0.737
EXTV #4, #10, Reg, Reg			  3.01	  3.61	 12.77	0.834	0.236
EXTZV #4, #10, R0, R1			  2.66	  3.29	 12.76	0.809	0.208
INSV Reg, #4, #10, Reg			  3.51	  4.10	 14.83	0.856	0.237
ROTL #10, Reg, Reg			  1.20	  1.28	  7.47	0.938	0.161
ASHL #10, Reg, Reg			  2.00	  4.03	 11.49	0.496	0.174
EMUL Reg, Reg, Reg, Reg			  6.83	 10.33	 20.52	0.661	0.333
EDIV Reg, Reg, Reg, Reg			 11.93	 11.86	100.31	1.006	0.119
XORL2 mem, Reg				  0.84	  1.58	  5.50	0.532	0.153
XORL2 Reg, Reg				  0.40	  0.93	  2.58	0.430	0.155
Move Packed 7 digits			  8.04	 17.44	 39.55	0.461	0.203
Add Packed 3 operand, 7 digits		 18.10	 30.78	 92.94	0.588	0.195
Add Packed 2 operand, 7 digits		 14.89	 27.02	 84.96	0.551	0.175
Move Packed 18 digits			 19.31	 38.21	 40.05	0.505	0.482
Add Packed 3 operand, 18 digits		 40.27	 60.97	160.50	0.660	0.251
Add Packed 2 operand, 18 digits		 35.39	 57.25	152.20	0.618	0.233
Multiply Packed 3 operand, 7 digits	 98.02	105.05	757.02	0.933	0.129
Multiply Packed 3 operand, 18 digits	397.88	439.22 3343.35	0.906	0.119
Divide Packed 3 operand, 7 digits	 40.44	 86.12	584.35	0.470	0.069
Divide Packed 3 operand, 18 digits	150.87	245.95 8473.45	0.613	0.018
Convert Trailing to Packed, 7 digits	 13.47	 24.14	 53.09	0.558	0.254
Convert Packed to Trailing, 7 digits	 14.48	 18.82	 73.27	0.769	0.198
Convert Packed to Long, 7 digits	 10.85	 16.96	 47.61	0.640	0.228
Convert Trailing to Packed, 18 digits	 25.57	 36.27	 87.51	0.705	0.292
Convert Packed to Trailing, 18 digits	 22.75	 37.18	143.55	0.612	0.158
Convert Packed to Long, 18 digits	 13.27	 21.01	 66.56	0.632	0.199
CRC 16 bytes				 47.91	 86.84	188.88	0.552	0.254



  VAX-11/780 vs. VAX-11/750 vs. VAX-11/730 WITH FPA
  INSTRUCTION			      <EXECUTION TIME MICROSECS> <TIMES 780>
					  780	  750	  730	 750	 730

INSERT AT TAIL + REMOVE FROM HEAD	 14.00	 15.07	 27.51	0.929	0.509
INTERLOCKED INSERT + REMOVE		 30.43	 26.43	 41.02	1.151	0.742
ADDF Reg, Reg				  0.80	  1.32	  6.39	0.606	0.125
MULF2 Reg, Reg				  1.20	  2.29	  9.66	0.524	0.124
SUBF Reg, Reg				  0.80	  1.32	  6.57	0.606	0.122
DIVF3 Reg, Reg, Reg			  4.62	  6.61	 10.60	0.699	0.436
POLYF (4th order)			  9.49	 25.35	 77.72	0.374	0.122
ADDD Reg, Reg				  1.40	  2.51	 12.85	0.558	0.109
MULD Reg, Reg				  3.41	  4.75	 19.11	0.718	0.178
SUBD Reg, Reg				  1.40	  2.45	 15.21	0.571	0.092
DIVD3 Reg, Reg, Reg			  8.84	 12.82	 19.58	0.690	0.451
POLYD (4th order)			 17.32	 36.49	102.13	0.475	0.170
ADDG2 Reg, Reg				 14.47	 24.65	 16.40	0.587	0.882
MULG2 Reg, Reg				 29.56	 50.64	 22.41	0.584	1.319
SUBG2 Reg, Reg				 14.47	 25.28	 18.81	0.572	0.769
DIVG3 Reg, Reg, Reg			 52.85	 81.03	 23.52	0.652	2.247
POLYG (4th order)			153.20	226.53	111.91	0.676	1.369
ADDH2 Reg, Reg				 27.54	 38.39	 23.81	0.717	1.157
MULH2 Reg, Reg				 85.21	155.54	 86.24	0.548	0.988
SUBH2 Reg, Reg				 27.73	 38.60	 26.08	0.718	1.063
DIVH3 Reg, Reg, Reg			223.00	350.96   91.33	0.635	2.442
POLYH (4th order)			579.68	681.13  415.34	0.851	1.396
ADDB Reg, Reg				  0.40	  0.94	  2.83	0.426	0.141
ADDW Reg, Reg				  0.40	  0.93	  2.65	0.430	0.151
ADDL Reg, Reg				  0.40	  0.93	  2.49	0.430	0.161
ADDL3 Reg, Reg, Reg			  0.60	  1.29	  2.83	0.465	0.212
ADDL #imed, Reg				  0.84	  1.69	  5.02	0.497	0.167
ADDL @Reg, Reg				  0.80	  1.11	  3.16	0.721	0.253
ADDL Reg, @Reg				  1.33	  1.61	  4.15	0.826	0.320
ADDL mem, mem				  1.72	  3.29	  9.67	0.523	0.178
ADDL B^disp(Reg), Reg			  0.80	  1.29	  3.67	0.620	0.218
ADDL (Reg)[Reg], Reg			  1.40	  1.82	  5.08	0.769	0.276
MOVL Reg, Reg				  0.40	  0.93	  1.69	0.430	0.237
MOVL mem, Reg				  0.84	  1.67	  4.94	0.503	0.170
MOVL Reg, mem				  1.31	  2.28	  4.88	0.575	0.268
CMPL AND BLEQ				  1.16	  2.32	  4.26	0.500	0.272
CMPL mem, Reg AND BLEQ			  1.88	  3.24	  7.31	0.580	0.257
TSTL AND BLEQ				  1.00	  2.42	  4.25	0.413	0.235
BRW					  0.80	  2.01	  2.57	0.398	0.311
MULL2 Reg, Reg				  1.85	  5.68	 12.05	0.326	0.154
MULL2 mem, Reg				  2.50	  6.55	 15.14	0.382	0.165
MULL2 Reg, mem				  2.48	  6.41	 15.11	0.387	0.164
DIVL3 Reg, Reg, Reg			  9.64	  8.88	 16.15	1.086	0.597
DIVL2 Reg, Reg				  9.44	  8.14	 15.23	1.160	0.620
DIVL mem, Reg				  9.68	  8.91	 19.73	1.086	0.491
BBS #22, Reg, disp			  1.41	  2.32	  5.10	0.608	0.276
BBCC #22, Reg, disp			  1.60	  2.90	  6.53	0.552	0.245
BBCCI #22, Reg, disp			  1.60	  2.90	  6.79	0.552	0.236
CALLS #0, ROUTINE + RET			 14.75	 20.87	 36.61	0.707	0.403
CALLG LIST, ROUTINE + RET		 13.87	 19.41	 37.65	0.715	0.368
CLRL Reg				  0.60	  1.00	  1.40	0.600	0.429
CLRQ Reg				  1.20	  1.32	  4.02	0.909	0.299
CMPC3 Reg, (Reg), (Reg) - 10 CHAR	 14.27	 26.48	 62.43	0.539	0.229
MOVC5 #0,(R1),#0,#512,BLOCK CLEAR MEM	111.42	142.40	160.36	0.782	0.695
EXTV #4, #10, Reg, Reg			  3.01	  3.61	 13.24	0.834	0.227
EXTZV #4, #10, R0, R1			  2.61	  3.29	 12.63	0.793	0.207
INSV Reg, #4, #10, Reg			  3.41	  4.10	 14.63	0.832	0.233
ROTL #10, Reg, Reg			  1.20	  1.28	  7.36	0.938	0.163
ASHL #10, Reg, Reg			  2.00	  4.03	 11.33	0.496	0.177
EMUL Reg, Reg, Reg, Reg			  6.83	  6.48	 20.23	1.054	0.338
EDIV Reg, Reg, Reg, Reg			 11.86	 11.86	100.29	1.000	0.118
XORL2 mem, Reg				  0.84	  1.58	  5.42	0.532	0.155
XORL2 Reg, Reg				  0.40	  0.93	  2.54	0.430	0.157
Move Packed 7 digits			  8.04	 17.44	 38.97	0.461	0.206
Add Packed 3 operand, 7 digits		 18.10	 30.78	 91.89	0.588	0.197
Add Packed 2 operand, 7 digits		 14.89	 27.02	 86.95	0.551	0.171
Move Packed 18 digits			 19.31	 38.21	 39.46	0.505	0.489
Add Packed 3 operand, 18 digits		 40.25	 60.97	158.27	0.660	0.254
Add Packed 2 operand, 18 digits		 35.39	 57.25	149.42	0.618	0.237
Multiply Packed 3 operand, 7 digits	 98.03	105.05	746.83	0.933	0.131
Multiply Packed 3 operand, 18 digits	397.88	439.22 3299.22	0.906	0.121
Divide Packed 3 operand, 7 digits	 40.45	 86.12	575.59	0.470	0.070
Divide Packed 3 operand, 18 digits	150.83	245.95 8402.25	0.613	0.018
Convert Trailing to Packed, 7 digits	 13.47	 24.14	 52.28	0.558	0.258
Convert Packed to Trailing, 7 digits	 14.49	 18.82	 72.23	0.770	0.201
Convert Packed to Long, 7 digits	 10.86	 16.96	 46.93	0.640	0.231
Convert Trailing to Packed, 18 digits	 25.57	 36.27	 86.55	0.705	0.295
Convert Packed to Trailing, 18 digits	 22.75	 37.18	141.44	0.612	0.161
Convert Packed to Long, 18 digits	 13.27	 21.01	 65.59	0.632	0.202
CRC 16 bytes				 47.89	 86.84	186.26	0.551	0.257