allbery@ncoast.UUCP (Brandon Allbery) (06/28/86)
Expires: Quoted from <796@tekcrl.UUCP> ["Re: cc(1): Questions about "-i""], by terryl@tekcrl.UUCP... +--------------- | In article <374@chinet.UUCP>, megabyte@chinet.UUCP (Mark E. Sunderlin) writes: | > | > My SYSIII machine has a -i option to its ld(1) command. It is described | > as such: | > -i Seperate the program text and data areas when the output file is | > executed. Text occupies segement 0; its origin is 0x0000. Data and bss | > occupy segement 1;data's origin is 0x0000. Bss follows data. | > ... | > If it means anything , I am running on a Zilog S8000 wih ZEUS 3.21 which is a | > sysIII port. | | Now to the -i flag to the loader. When you specify the -i option to the | loader, the program instructions and data are NOT really mixed in among each | other, even though it may look like that. What you have to remember is that | a program running in VIRTUAL space actually has two address spaces to access: | instruction space, and data space. Each space is separate (hence the name | separate I/D) and independent of one another. It is up to the loader to | link the file correctly with the correct address in either instruction space | or data space, so the program can run correctly. It is then up to the opera- | ting system to set up both sets of memory management registers (at least on | the PDP) correctly so the program can run. +--------------- Just one comment. The Z8000 (to be precise, the Z8001) is segmented rather similarly to the 8086; but the Z8001 can handle memory management. As a result, the PDP-11 style of memory management is used on Z8001's. (Why Z8001? The Z8000 doesn't have segment registers and can only address 64K. Period.) --Brandon -- ihnp4!sun!cwruecmp!ncoast!allbery ncoast!allbery@Case.CSNET ncoast!tdi2!brandon (ncoast!tdi2!root for business) 6615 Center St. #A1-105, Mentor, OH 44060-4101 Phone: +01 216 974 9210 CIS 74106,1032 MCI MAIL BALLBERY (part-time)
grr@cbmvax.cbm.UUCP (George Robbins) (06/30/86)
In article <1270@ncoast.UUCP> allbery@ncoast.UUCP (Brandon Allbery) writes: >Just one comment. The Z8000 (to be precise, the Z8001) is segmented rather >similarly to the 8086; but the Z8001 can handle memory management. As a >result, the PDP-11 style of memory management is used on Z8001's. Well, it's really only like the 8086 in the sense that there's a large model/small (segmented/non-segmented) distinction. The segment registers are handled quite diferently and there 64/128 of them when using a MMU(s). The hardware programming model is very similar to a PDP-11 with separate I&D space, although the Zilog unix port messes this up a bit. >(Why Z8001? The Z8000 doesn't have segment registers and can only address >64K. Period.) No, the Z8000 is a generic title. The basic Z8000 chip is packaged in either at 40 (Z8002) or 48 (Z8001) pin package. The 40 pin package does not bring out the lines for the "segment" part of the address. You still can have I&D space for 128K total. There are some other tricks you play, but they're not useful outside of dedicated applications. -- George Robbins - now working with, uucp: {ihnp4|seismo|caip}!cbmvax!grr but no way officially representing arpa: cbmvax!grr@seismo.css.GOV Commodore, Engineering Department fone: 215-431-9255 (only by moonlite)