jim@mcvax.UUCP (Jim McKie) (02/01/85)
: This is a shar archive. Extract with sh, not csh.
: The rest of this file will extract:
: README boot.diff hp.diff uda.diff pcs750.uuenc
echo x - README
cat > README <<'!End-Of-README!'
Vax 11/750 PCS Update
---------------------
Contained herein are four files necessary to make a new 'Boot'
program for the Vax 11/750 which has been FCO'ed to have loadable
microcode patches. For such systems, the microcode revision level
in the SID register is 95 or greater. (This is usually referred to
as 'Rev 7').
The four files are:
boot.diff to make a new version of /sys/stand/boot.c
hp.diff to make a new version of /sys/stand/hp.c
uda.diff to make a new version of /sys/stand/uda.c
pcs750.uuenc a uuencode(1)'ed version of the rev. 98
microcode patches
The changes to boot.c are to allow it to check the microcode revision
level and load the patches if necessary and possible.
The changes to uda.c are to allow it to open more than one file.
The changes to hp.c are for the RM80, you may have these already.
These changes are known to work with
UDA50 + DEC RA81, DEC RA60
Emulex SC750 + Fujitsu Eagle, DEC RM80
The work in boot.c was done by Tom Ferrin of UCSF (ucsfcgl!tef) and the
UDA50 and RM80 problems diagnosed and these notes by Jim McKie (mcvax!jim).
What to do
----------
Extract this 'shar' archive into a clean directory:
sh Name-Of-This-File
Install the microcode patch file in the root directory:
uudecode pcs750.uuenc
mv pcs750.bin /pcs750.bin
chmod 0400 /pcs750.bin
Make a new version of the file '/boot' in /sys/stand using the
changes in the "*.diff" files.new versions of boot.c and uda.c:
save old versions of /sys/stand/boot.c /sys/stand/hp.c
and /sys/stand/uda.c
edit in the changes from the "*.diff" files to those
in /sys/stand
cd /sys/stand
make boot
Copy this file to /pcsboot for the moment:
cp boot /pcsboot
Halt the system, then, assuming you have a UDA50 controller
(lines you type are marked with a '*')
* >>>B/3
%%
loading ra(0,0)boot
Boot
* : ra(0,0)pcsboot
15800+4108+149216 start 0x0
Boot
* : ra(0,0)vmunix
Updating 11/750 microcode: new rev level=98
172720+52472+45232 start 0x1120
4.2 BSD UNIX #6: Wed Sep 26 18:10:20 MET DST 1984
real mem =...
If that all works OK, then you can replace /boot with /pcsboot.
If it doesn't, then maybe there is a bug in your standalone driver
for the disk you are using (there was one in the UDA50 driver),
or perhaps you haven't got the correct rev installed?
Good luck, Jim McKie. 31/01/85
Centrum voor Wiskunde en Informatica
Kruislaan 413
1098 SJ Amsterdam
The Netherlands
tel: +31 20 5924147
UUCP: mcvax!jim
!End-Of-README!
echo x - boot.diff
cat > boot.diff <<'!End-Of-boot.diff!'
1c1,2
< /* boot.c 6.1 83/07/29; CWI 1.1 1/31/85 */
---
> /* boot.c 6.1 83/07/29; CWI 1.3 10/2/84 */
> /* $Header: /usr/sys/stand/RCS/boot.c,v 1.1 84/09/05 08:54:53 tef Exp $ */
68c69,70
< if (io >= 0)
---
> if (io >= 0) {
> loadpcs();
69a72
> }
109a113,188
> }
>
> /* 750 Patchable Control Store magic */
>
> #include "../vax/mtpr.h"
> #include "../vax/cpu.h"
> #define PCS_BITCNT 0x2000 /* number of patchbits */
> #define PCS_MICRONUM 0x400 /* number of ucode locs */
> #define PCS_PATCHADDR 0xf00000 /* start addr of patchbits */
> #define PCS_PCSADDR (PCS_PATCHADDR+0x8000) /* start addr of pcs */
> #define PCS_PATCHBIT (PCS_PATCHADDR+0xc000) /* patchbits enable reg */
> #define PCS_ENABLE 0xfff00000 /* enable bits for pcs */
>
> loadpcs()
> {
> register int *ip; /* known to be r11 below */
> register int i; /* known to be r10 below */
> register int *jp; /* known to be r9 below */
> register int j;
> static int pcsdone = 0;
> union cpusid sid;
> char pcs[100];
>
> sid.cpusid = mfpr(SID);
> if (sid.cpuany.cp_type!=VAX_750 || sid.cpu750.cp_urev<95 || pcsdone)
> return;
> printf("Updating 11/750 microcode: ");
> strncpy(pcs, line, strlen("xx(0,0)"));
> strcat(pcs, "pcs750.bin");
> i = open(pcs, 0);
> if (i < 0)
> return;
> /*
> * We ask for more than we need to be sure we get only what we expect.
> * After read:
> * locs 0 - 1023 packed patchbits
> * 1024 - 11264 packed microcode
> */
> if (read(i, (char *)0, 23*512) != 22*512) {
> printf("Error reading %s\n", pcs);
> close(i);
> return;
> }
> close(i);
>
> /*
> * Enable patchbit loading and load the bits one at a time.
> */
> *((int *)PCS_PATCHBIT) = 1;
> ip = (int *)PCS_PATCHADDR;
> jp = (int *)0;
> for (i=0; i < PCS_BITCNT; i++) {
> asm(" extzv r10,$1,(r9),(r11)+");
> }
> *((int *)PCS_PATCHBIT) = 0;
>
> /*
> * Load PCS microcode 20 bits at a time.
> */
> ip = (int *)PCS_PCSADDR;
> jp = (int *)1024;
> for (i=j=0; j < PCS_MICRONUM * 4; i+=20, j++) {
> asm(" extzv r10,$20,(r9),(r11)+");
> }
>
> /*
> * Enable PCS.
> */
> i = *jp; /* get 1st 20 bits of microcode again */
> i &= 0xfffff;
> i |= PCS_ENABLE; /* reload these bits with PCS enable set */
> *((int *)PCS_PCSADDR) = i;
>
> sid.cpusid = mfpr(SID);
> printf("new rev level=%d\n", sid.cpu750.cp_urev);
> pcsdone = 1;
!End-Of-boot.diff!
echo x - hp.diff
cat > hp.diff <<'!End-Of-hp.diff!'
1c1
< /* hp.c 6.3 83/09/23; CWI 1.1 1/31/85 */
---
> /* hp.c 1.4 84/12/05; CWI 1.4 84/12/05 */
98c98
< hp_type[unit] = hpmaptype(hpaddr, i, unit);
---
> hp_type[unit] = hpmaptype(hpaddr, i, UNITTODRIVE(unit));
120a121
> st = &hpst[hp_type[unit]];
262a264,271
> * Skip sector handling.
> */
> if (RM80 && (er2 & HPER2_SSE)) {
> (void) hpecc(io, SSE);
> ssect[unit] = 1;
> goto restart;
> }
> /*
264,267c273
< * anything but an ML11. If drive
< * supports skip sector handling, try to
< * use it first; otherwise try the
< * bad sector table.
---
> * anything but an ML11.
271,272d276
< if (!ssect[unit] && (er2&HPER2_SSE))
< goto skipsect;
282d285
<
284,292d286
< * Skip sector handling.
< */
< if (RM80 && (er2 & HPER2_SSE)) {
< skipsect:
< (void) hpecc(io, SSE);
< ssect[unit] = 1;
< goto success;
< }
< /*
352,353c346,347
< while (hpaddr->hpds & HPDS_PIP)
< ;
---
> while ((hpaddr->hpds & (HPDS_DRY | HPDS_PIP)) != HPDS_DRY)
> DELAY(100);
354a349,350
> if (ssect[unit])
> hpaddr->hpof &= ~HPOF_SSEI;
461c457,461
< return (rp->hpds&HPDS_ERR);
---
> if (rp->hpds & HPDS_ERR)
> return (1);
> if (ssect[unit])
> rp->hpof |= HPOF_SSEI;
> return (0);
!End-Of-hp.diff!
echo x - uda.diff
cat > uda.diff <<'!End-Of-uda.diff!'
1c1
< /* uda.c 6.1 83/07/29; CWI 1.1 1/31/85 */
---
> /* uda.c 6.1 83/07/29; CWI 1.4 84/10/02 */
48a49
> static int udainit;
53a55,59
> /*
> * Initialise cudbuf.i_unit so that controllers
> * on UNIBUSes other than 0 can be used.
> */
> cudbuf.i_unit = io->i_unit;
58,81c64,90
< udaddr->udaip = 0;
< while ((udaddr->udasa & UDA_STEP1) == 0)
< ;
< udaddr->udasa = UDA_ERR;
< while ((udaddr->udasa & UDA_STEP2) == 0)
< ;
< udaddr->udasa = (short)&ud_ubaddr->uda_ca.ca_ringbase;
< while ((udaddr->udasa & UDA_STEP3) == 0)
< ;
< udaddr->udasa = (short)(((int)&ud_ubaddr->uda_ca.ca_ringbase) >> 16);
< while ((udaddr->udasa & UDA_STEP4) == 0)
< ;
< udaddr->udasa = UDA_GO;
< uda.uda_ca.ca_rspdsc[0] = (long)&ud_ubaddr->uda_rsp.mscp_cmdref;
< uda.uda_ca.ca_cmddsc[0] = (long)&ud_ubaddr->uda_cmd.mscp_cmdref;
< uda.uda_cmd.mscp_cntflgs = 0;
< if (udcmd(M_OP_STCON) == 0) {
< _stop("ra: open error, STCON");
< return;
< }
< uda.uda_cmd.mscp_unit = io->i_unit&7;
< if (udcmd(M_OP_ONLIN) == 0) {
< _stop("ra: open error, ONLIN");
< return;
---
> if(udainit == 0){
> udaddr->udaip = 0;
> while ((udaddr->udasa & UDA_STEP1) == 0)
> ;
> udaddr->udasa = UDA_ERR;
> while ((udaddr->udasa & UDA_STEP2) == 0)
> ;
> udaddr->udasa = (short)&ud_ubaddr->uda_ca.ca_ringbase;
> while ((udaddr->udasa & UDA_STEP3) == 0)
> ;
> udaddr->udasa = (short)(((int)&ud_ubaddr->uda_ca.ca_ringbase) >> 16);
> while ((udaddr->udasa & UDA_STEP4) == 0)
> ;
> udaddr->udasa = UDA_GO;
> uda.uda_ca.ca_rspdsc[0] = (long)&ud_ubaddr->uda_rsp.mscp_cmdref;
> uda.uda_ca.ca_cmddsc[0] = (long)&ud_ubaddr->uda_cmd.mscp_cmdref;
> uda.uda_cmd.mscp_cntflgs = 0;
> if (udcmd(M_OP_STCON) == 0) {
> _stop("ra: open error, STCON");
> return;
> }
> uda.uda_cmd.mscp_unit = io->i_unit&7;
> if (udcmd(M_OP_ONLIN) == 0) {
> _stop("ra: open error, ONLIN");
> return;
> }
> udainit = 1;
!End-Of-uda.diff!
echo x - pcs750.uuenc
cat > pcs750.uuenc <<'!End-Of-pcs750.uuenc!'
begin 444 pcs750.bin
M____________________________________________________________
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M____________________________________________O_______________
M__________________O___O_____________________________________
M____________________________]_______________________________
MW___________________________________________________________
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M______________________________________OW____________________
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M_____________________________________________SDH1P V0# $@Y
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M9 , 2#DH1P V0# $@Y*$< -D P!(.2A' #9 , 2#DH1P V0# $@Y
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M9 , 2#DH1P V0# $@Y*$< -D P!(.2A' #9 , 2#DH1P V0# $A5
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end
!End-Of-pcs750.uuenc!