jimv (01/06/83)
Ran into an interesting problem with the line time clock on an 11/23 the other day. As you know, the clock interrupts are driven off of the BEVNT line on the QBUS, which I guess is tied to the 60HZ of the wall plug, and hence there is no clock device. This is not quite accurate, in that the bus terminator (BDV11) answers the standard clock device address. However, the register is write only and only one bit is implemented: the interrupt enable bit. If you strap the terminator board the proper way, you sort of have a programmable line clock. On power up in this case, the terminator ``clamps down on'' the BEVNT line, thereby disabling the clock. When the i/e bit is written, the ``clamp'' is released. As far as I could tell, the clamp can only be re-established by cycling the power on the bus (terminator). Now this is no big deal, right? Wrong. Since a reset instruction does not re-establish the clamp, UNIX will not boot unless the power is cycled. Fine. Now add an expansion box to the 11/23, each with its own power supply. The clamp on the terminator board only applies to the expansion box, and meanwhile the original box with the cpu in it is happily watching the (unclamped) BEVNT line. This causes UNIX to bomb out in the assembly language startup just prior to the `jsr pc,_main' when it sets the cpu priority level to 0. Since the bootstrap rom and the standalone boot program run at spl7, only the kernel needs to be patched. I dealt with the problem in the following way: 1) Declare external to clkstart/machdep.c a flag, say int clkinit = 0; 2) In clkstart/machdep.c, add the line clkinit = 1; after the clock is initially primed. 3) External to clock/clock.c, declare extern int clkinit; 4) Insert before the clock is re-primed (as the first executable instruction) the test if (clkinit == 0) return; This is clumsy, but it works. --Jim